1 /* Copyright (c) 2004-2015. The SimGrid Team.
2 * All rights reserved. */
4 /* This program is free software; you can redistribute it and/or modify it
5 * under the terms of the license (GNU LGPL) which comes with this package. */
7 #include "surf_interface.hpp"
8 #include "maxmin_private.hpp"
10 #ifndef SURF_CPU_INTERFACE_HPP_
11 #define SURF_CPU_INTERFACE_HPP_
28 XBT_PUBLIC(Cpu*) getActionCpu(CpuAction *action);
34 /** @ingroup SURF_cpu_interface
35 * @brief SURF cpu model interface class
36 * @details A model is an object which handle the interactions between its Resources and its Actions
38 XBT_PUBLIC_CLASS CpuModel : public Model {
40 CpuModel() : Model() {};
45 * @param host The host that will have this CPU
46 * @param speedPeak The peak spead (max speed in Flops)
47 * @param pstate [TODO]
48 * @param speedScale The speed scale (in [O;1] available speed from peak)
49 * @param speedTrace Trace variations
50 * @param core The number of core of this Cpu
51 * @param initiallyOn [TODO]
52 * @param state_trace [TODO]
54 virtual Cpu *createCpu(simgrid::s4u::Host *host, xbt_dynar_t speedPeak,
55 int pstate, double speedScale,
56 tmgr_trace_t speedTrace, int core,
58 tmgr_trace_t state_trace)=0;
60 void updateActionsStateLazy(double now, double delta);
61 void updateActionsStateFull(double now, double delta);
62 bool next_occuring_event_isIdempotent() {return true;}
69 /** @ingroup SURF_cpu_interface
70 * @brief SURF cpu resource interface class
71 * @details A Cpu represent a cpu associated to a host
73 XBT_PUBLIC_CLASS Cpu : public simgrid::surf::Resource {
76 * @brief Cpu constructor
78 * @param model The CpuModel associated to this Cpu
79 * @param host The host in which this Cpu should be plugged
80 * @param constraint The lmm constraint associated to this Cpu if it is part of a LMM component
81 * @param speedPeakList [TODO]
82 * @param pstate [TODO]
83 * @param core The number of core of this Cpu
84 * @param speedPeak The speed peak of this Cpu in flops (max speed)
85 * @param speedScale The speed scale of this Cpu in [0;1] (available amount)
86 * @param initiallyOn whether it is created running or crashed
88 Cpu(simgrid::surf::Model *model, simgrid::s4u::Host *host,
89 lmm_constraint_t constraint,
90 xbt_dynar_t speedPeakList, int pstate,
91 int core, double speedPeak, double speedScale,
95 * @brief Cpu constructor
97 * @param model The CpuModel associated to this Cpu
98 * @param host The host in which this Cpu should be plugged
99 * @param speedPeakList [TODO]
101 * @param core The number of core of this Cpu
102 * @param speedPeak The speed peak of this Cpu in flops (max speed)
103 * @param speedScale The speed scale of this Cpu in [0;1] (available amount)
104 * @param initiallyOn whether it is created running or crashed
106 Cpu(simgrid::surf::Model *model, simgrid::s4u::Host *host,
107 xbt_dynar_t speedPeakList, int pstate,
108 int core, double speedPeak, double speedScale,
114 * @brief Execute some quantity of computation
116 * @param size The value of the processing amount (in flop) needed to process
117 * @return The CpuAction corresponding to the processing
119 virtual simgrid::surf::Action *execution_start(double size)=0;
122 * @brief Make a process sleep for duration (in seconds)
124 * @param duration The number of seconds to sleep
125 * @return The CpuAction corresponding to the sleeping
127 virtual simgrid::surf::Action *sleep(double duration)=0;
129 /** @brief Get the amount of cores */
130 virtual int getCore();
132 /** @brief Get the speed, accounting for the trace load and provided process load instead of the real current one */
133 virtual double getSpeed(double load);
136 /** @brief Take speed changes (either load or max) into account */
137 virtual void onSpeedChange();
140 /** @brief Get the available speed of the current Cpu */
141 virtual double getAvailableSpeed();
143 /** @brief Get the current Cpu power peak */
144 virtual double getCurrentPowerPeak();
146 virtual double getPowerPeakAt(int pstate_index);
148 virtual int getNbPStates();
149 virtual void setPState(int pstate_index);
150 virtual int getPState();
152 simgrid::s4u::Host* getHost() { return m_host; }
155 int m_core = 1; /* Amount of cores */
156 simgrid::s4u::Host* m_host;
158 xbt_dynar_t p_speedPeakList = NULL; /*< List of supported CPU capacities (pstate related) */
159 int m_pstate = 0; /*< Current pstate (index in the speedPeakList)*/
161 /* Note (hypervisor): */
162 lmm_constraint_t *p_constraintCore=NULL;
163 void **p_constraintCoreId=NULL;
166 virtual void set_state_trace(tmgr_trace_t trace); /*< setup the trace file with states events (ON or OFF). Trace must contain boolean values (0 or 1). */
167 virtual void set_speed_trace(tmgr_trace_t trace); /*< setup the trace file with availability events (peak speed changes due to external load). Trace must contain relative values (ratio between 0 and 1) */
169 tmgr_trace_iterator_t p_stateEvent = nullptr;
170 s_surf_metric_t p_speed = {1.0, 0, nullptr};
177 /** @ingroup SURF_cpu_interface
178 * @brief SURF Cpu action interface class
179 * @details A CpuAction represent the execution of code on a Cpu
181 XBT_PUBLIC_CLASS CpuAction : public simgrid::surf::Action {
182 friend XBT_PUBLIC(Cpu*) getActionCpu(CpuAction *action);
184 /** @brief Callbacks handler which emit the callbacks after CpuAction State changed *
185 * @details Callback functions have the following signature: `void(CpuAction *action, e_surf_action_state_t previous)`
187 static simgrid::xbt::signal<void(simgrid::surf::CpuAction*, e_surf_action_state_t)> onStateChange;
189 /** @brief CpuAction constructor */
190 CpuAction(simgrid::surf::Model *model, double cost, bool failed)
191 : Action(model, cost, failed) {} //FIXME:DEADCODE?
193 /** @brief CpuAction constructor */
194 CpuAction(simgrid::surf::Model *model, double cost, bool failed, lmm_variable_t var)
195 : Action(model, cost, failed, var) {}
198 * @brief Set the affinity of the current CpuAction
201 virtual void setAffinity(Cpu *cpu, unsigned long mask);
203 void setState(e_surf_action_state_t state);
205 void updateRemainingLazy(double now);
212 #endif /* SURF_CPU_INTERFACE_HPP_ */