1 /* Copyright (c) 2008-2013 Da SimGrid Team. All rights reserved. */
3 /* This program is free software; you can redistribute it and/or modify it
4 * under the terms of the license (GNU LGPL) which comes with this package. */
6 #include "../simix/smx_private.h"
8 #include "mc_private.h"
11 * \brief Creates a state data structure used by the exploration algorithm
13 mc_state_t MC_state_new()
15 mc_state_t state = NULL;
17 state = xbt_new0(s_mc_state_t, 1);
18 state->max_pid = simix_process_maxpid;
19 state->proc_status = xbt_new0(s_mc_procstate_t, state->max_pid);
20 state->system_state = NULL;
21 state->num = ++mc_stats->expanded_states;
27 * \brief Deletes a state data structure
28 * \param trans The state to be deleted
30 void MC_state_delete(mc_state_t state)
32 if(state->system_state)
33 MC_free_snapshot(state->system_state);
34 xbt_free(state->proc_status);
38 void MC_state_interleave_process(mc_state_t state, smx_process_t process)
40 state->proc_status[process->pid].state = MC_INTERLEAVE;
41 state->proc_status[process->pid].interleave_count = 0;
44 void MC_state_remove_interleave_process(mc_state_t state, smx_process_t process)
46 if(state->proc_status[process->pid].state == MC_INTERLEAVE)
47 state->proc_status[process->pid].state = MC_DONE;
50 unsigned int MC_state_interleave_size(mc_state_t state)
52 unsigned int i, size=0;
54 for(i=0; i < state->max_pid; i++){
55 if((state->proc_status[i].state == MC_INTERLEAVE) || (state->proc_status[i].state == MC_MORE_INTERLEAVE))
62 int MC_state_process_is_done(mc_state_t state, smx_process_t process){
63 return state->proc_status[process->pid].state == MC_DONE ? TRUE : FALSE;
66 void MC_state_set_executed_request(mc_state_t state, smx_simcall_t req, int value)
68 state->executed_req = *req;
69 state->req_num = value;
70 smx_process_t process = NULL;
71 mc_procstate_t procstate = NULL;
73 /* The waitany and testany request are transformed into a wait or test request over the
74 * corresponding communication action so it can be treated later by the dependence
77 case SIMCALL_COMM_WAITANY:
78 state->internal_req.call = SIMCALL_COMM_WAIT;
79 state->internal_req.issuer = req->issuer;
80 state->internal_comm = *xbt_dynar_get_as(simcall_comm_waitany__get__comms(req), value, smx_action_t);
81 simcall_comm_wait__set__comm(&state->internal_req, &state->internal_comm);
82 simcall_comm_wait__set__timeout(&state->internal_req, 0);
85 case SIMCALL_COMM_TESTANY:
86 state->internal_req.call = SIMCALL_COMM_TEST;
87 state->internal_req.issuer = req->issuer;
90 state->internal_comm = *xbt_dynar_get_as(simcall_comm_testany__get__comms(req), value, smx_action_t);
92 simcall_comm_test__set__comm(&state->internal_req, &state->internal_comm);
93 simcall_comm_test__set__result(&state->internal_req, value);
96 case SIMCALL_COMM_WAIT:
97 state->internal_req = *req;
98 state->internal_comm = *(simcall_comm_wait__get__comm(req));
99 simcall_comm_wait__set__comm(&state->executed_req, &state->internal_comm);
100 simcall_comm_wait__set__comm(&state->internal_req, &state->internal_comm);
103 case SIMCALL_COMM_TEST:
104 state->internal_req = *req;
105 state->internal_comm = *simcall_comm_test__get__comm(req);
106 simcall_comm_test__set__comm(&state->executed_req, &state->internal_comm);
107 simcall_comm_test__set__comm(&state->internal_req, &state->internal_comm);
110 case SIMCALL_MC_RANDOM:
111 state->internal_req = *req;
112 simcall_mc_random__set__result(&state->internal_req, value);
114 xbt_swag_foreach(process, simix_global->process_list){
115 procstate = &state->proc_status[process->pid];
116 if(process->pid == req->issuer->pid){
117 procstate->state = MC_MORE_INTERLEAVE;
125 state->internal_req = *req;
130 smx_simcall_t MC_state_get_executed_request(mc_state_t state, int *value)
132 *value = state->req_num;
133 return &state->executed_req;
136 smx_simcall_t MC_state_get_internal_request(mc_state_t state)
138 return &state->internal_req;
141 smx_simcall_t MC_state_get_request(mc_state_t state, int *value)
143 smx_process_t process = NULL;
144 mc_procstate_t procstate = NULL;
145 unsigned int start_count;
147 xbt_swag_foreach(process, simix_global->process_list){
148 procstate = &state->proc_status[process->pid];
150 if(procstate->state == MC_INTERLEAVE || procstate->state == MC_MORE_INTERLEAVE){
151 if(MC_process_is_enabled(process)){
152 switch(process->simcall.call){
153 case SIMCALL_COMM_WAITANY:
155 while(procstate->interleave_count < xbt_dynar_length(simcall_comm_waitany__get__comms(&process->simcall))){
156 if(MC_request_is_enabled_by_idx(&process->simcall, procstate->interleave_count++)){
157 *value = procstate->interleave_count-1;
162 if(procstate->interleave_count >= xbt_dynar_length(simcall_comm_waitany__get__comms(&process->simcall)))
163 procstate->state = MC_DONE;
166 return &process->simcall;
170 case SIMCALL_COMM_TESTANY:
171 start_count = procstate->interleave_count;
173 while(procstate->interleave_count < xbt_dynar_length(simcall_comm_testany__get__comms(&process->simcall))){
174 if(MC_request_is_enabled_by_idx(&process->simcall, procstate->interleave_count++)){
175 *value = procstate->interleave_count - 1;
180 if(procstate->interleave_count >= xbt_dynar_length(simcall_comm_testany__get__comms(&process->simcall)))
181 procstate->state = MC_DONE;
183 if(*value != -1 || start_count == 0)
184 return &process->simcall;
188 case SIMCALL_COMM_WAIT:
189 if(simcall_comm_wait__get__comm(&process->simcall)->comm.src_proc
190 && simcall_comm_wait__get__comm(&process->simcall)->comm.dst_proc){
195 procstate->state = MC_DONE;
196 return &process->simcall;
200 case SIMCALL_MC_RANDOM:
201 if(procstate->state == MC_INTERLEAVE)
205 procstate->state = MC_DONE;
206 return &process->simcall;
210 procstate->state = MC_DONE;
212 return &process->simcall;