+ unsigned int i, size=0;
+
+ for(i=0; i < state->max_pid; i++){
+ if(state->proc_status[i].state == MC_INTERLEAVE)
+ size++;
+ }
+
+ return size;
+}
+
+int MC_state_process_is_done(mc_state_t state, smx_process_t process){
+ return state->proc_status[process->pid].state == MC_DONE ? TRUE : FALSE;
+}
+
+void MC_state_set_executed_request(mc_state_t state, smx_simcall_t req, int value)
+{
+ state->executed_req = *req;
+ state->req_num = value;
+
+ /* The waitany and testany request are transformed into a wait or test request over the
+ * corresponding communication action so it can be treated later by the dependence
+ * function. */
+ switch(req->call){
+ case SIMCALL_COMM_WAITANY:
+ state->internal_req.call = SIMCALL_COMM_WAIT;
+ state->internal_req.issuer = req->issuer;
+ state->internal_comm = *xbt_dynar_get_as(simcall_comm_waitany__get__comms(req), value, smx_action_t);
+ simcall_comm_wait__set__comm(&state->internal_req, &state->internal_comm);
+ simcall_comm_wait__set__timeout(&state->internal_req, 0);
+ break;
+
+ case SIMCALL_COMM_TESTANY:
+ state->internal_req.call = SIMCALL_COMM_TEST;
+ state->internal_req.issuer = req->issuer;
+
+ if(value > 0)
+ state->internal_comm = *xbt_dynar_get_as(simcall_comm_testany__get__comms(req), value, smx_action_t);
+
+ simcall_comm_test__set__comm(&state->internal_req, &state->internal_comm);
+ simcall_comm_test__set__result(&state->internal_req, value);
+ break;
+
+ case SIMCALL_COMM_WAIT:
+ state->internal_req = *req;
+ state->internal_comm = *(simcall_comm_wait__get__comm(req));
+ simcall_comm_wait__set__comm(&state->executed_req, &state->internal_comm);
+ simcall_comm_wait__set__comm(&state->internal_req, &state->internal_comm);
+ break;
+
+ case SIMCALL_COMM_TEST:
+ state->internal_req = *req;
+ state->internal_comm = *simcall_comm_test__get__comm(req);
+ simcall_comm_test__set__comm(&state->executed_req, &state->internal_comm);
+ simcall_comm_test__set__comm(&state->internal_req, &state->internal_comm);
+ break;
+
+ default:
+ state->internal_req = *req;
+ break;
+ }
+}
+
+smx_simcall_t MC_state_get_executed_request(mc_state_t state, int *value)
+{
+ *value = state->req_num;
+ return &state->executed_req;
+}
+
+smx_simcall_t MC_state_get_internal_request(mc_state_t state)
+{
+ return &state->internal_req;
+}
+
+smx_simcall_t MC_state_get_request(mc_state_t state, int *value)
+{
+ smx_process_t process = NULL;
+ mc_procstate_t procstate = NULL;
+ unsigned int start_count;
+
+ xbt_swag_foreach(process, simix_global->process_list){
+ procstate = &state->proc_status[process->pid];
+
+ if(procstate->state == MC_INTERLEAVE){
+ if(MC_process_is_enabled(process)){
+ switch(process->simcall.call){
+ case SIMCALL_COMM_WAITANY:
+ *value = -1;
+ while(procstate->interleave_count < xbt_dynar_length(simcall_comm_waitany__get__comms(&process->simcall))){
+ if(MC_request_is_enabled_by_idx(&process->simcall, procstate->interleave_count++)){
+ *value = procstate->interleave_count-1;
+ break;
+ }
+ }
+
+ if(procstate->interleave_count >= xbt_dynar_length(simcall_comm_waitany__get__comms(&process->simcall)))
+ procstate->state = MC_DONE;
+
+ if(*value != -1)
+ return &process->simcall;
+
+ break;
+
+ case SIMCALL_COMM_TESTANY:
+ start_count = procstate->interleave_count;
+ *value = -1;
+ while(procstate->interleave_count < xbt_dynar_length(simcall_comm_testany__get__comms(&process->simcall))){
+ if(MC_request_is_enabled_by_idx(&process->simcall, procstate->interleave_count++)){
+ *value = procstate->interleave_count - 1;
+ break;
+ }
+ }
+
+ if(procstate->interleave_count >= xbt_dynar_length(simcall_comm_testany__get__comms(&process->simcall)))
+ procstate->state = MC_DONE;
+
+ if(*value != -1 || start_count == 0)
+ return &process->simcall;
+
+ break;
+
+ case SIMCALL_COMM_WAIT:
+ if(simcall_comm_wait__get__comm(&process->simcall)->comm.src_proc
+ && simcall_comm_wait__get__comm(&process->simcall)->comm.dst_proc){
+ *value = 0;
+ }else{
+ *value = -1;
+ }
+ procstate->state = MC_DONE;
+ return &process->simcall;
+
+ break;
+
+ default:
+ procstate->state = MC_DONE;
+ *value = 0;
+ return &process->simcall;
+ break;
+ }
+ }