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rename the datacontainers allowing the trace:connect tag
[simgrid.git] / src / surf / cpu_cas01.cpp
index ae557e6..8db9a03 100644 (file)
@@ -126,7 +126,7 @@ void CpuCas01Model::addTraces()
     host->p_stateEvent = future_evt_set->add_trace(trace, 0.0, host);
   }
 
-  xbt_dict_foreach(trace_connect_list_power, cursor, trace_name, elm) {
+  xbt_dict_foreach(trace_connect_list_host_speed, cursor, trace_name, elm) {
     tmgr_trace_t trace = (tmgr_trace_t) xbt_dict_get_or_null(traces_set_list, trace_name);
     CpuCas01 *host = static_cast<CpuCas01*>(sg_host_by_name(elm)->pimpl_cpu);
 
@@ -205,8 +205,7 @@ void CpuCas01::updateState(tmgr_trace_iterator_t event_type, double value, doubl
     m_speedScale = value;
     onSpeedChange();
 
-    if (tmgr_trace_event_free(event_type))
-      p_speedEvent = nullptr;
+    tmgr_trace_event_unref(&p_speedEvent);
   } else if (event_type == p_stateEvent) {
     /* TODO (Hypervisor): do the same thing for constraint_core[i] */
     xbt_assert(m_core == 1, "FIXME: add state change code also for constraint_core[i]");
@@ -231,8 +230,7 @@ void CpuCas01::updateState(tmgr_trace_iterator_t event_type, double value, doubl
         }
       }
     }
-    if (tmgr_trace_event_free(event_type))
-      p_stateEvent = nullptr;
+    tmgr_trace_event_unref(&p_stateEvent);
   } else {
     xbt_die("Unknown event!\n");
   }
@@ -240,7 +238,7 @@ void CpuCas01::updateState(tmgr_trace_iterator_t event_type, double value, doubl
   return;
 }
 
-CpuAction *CpuCas01::execute(double size)
+CpuAction *CpuCas01::execution_start(double size)
 {
 
   XBT_IN("(%s,%g)", getName(), size);