[trace] improve insertion sort by starting from the end

[simgrid.git] / src / surf / cpu_im.c

diff --git a/src/surf/cpu_im.c b/src/surf/cpu_im.c
index 492191b..229c84d 100644 (file)
--- a/src/surf/cpu_im.c
+++ b/src/surf/cpu_im.c
@@ -59,20 +59,20 @@ static cpu_Cas01_im_t cpu_im_new(char *name, double power_peak,
   s_surf_action_cpu_Cas01_im_t action;
   cpu = xbt_new0(s_cpu_Cas01_im_t, 1);
 
-  xbt_assert1(!surf_cpu_resource_by_name(name),
+  xbt_assert(!surf_cpu_resource_by_name(name),
               "Host '%s' declared several times in the platform file",
               name);
   cpu->generic_resource.model = surf_cpu_model;
   cpu->generic_resource.name = name;
   cpu->generic_resource.properties = cpu_properties;
   cpu->power_peak = power_peak;
-  xbt_assert0(cpu->power_peak > 0, "Power has to be >0");
+  xbt_assert(cpu->power_peak > 0, "Power has to be >0");
   cpu->power_scale = power_scale;
   if (power_trace)
     cpu->power_event =
         tmgr_history_add_trace(history, power_trace, 0.0, 0, cpu);
   cpu->core = core;
-  xbt_assert1(core>0,"Invalid number of cores %d",core);
+  xbt_assert(core>0,"Invalid number of cores %d",core);
 
   cpu->state_current = state_initial;
   if (state_trace)
@@ -104,7 +104,7 @@ static void parse_cpu_im_init(void)
   power_trace = tmgr_trace_new(A_surfxml_host_availability_file);
   surf_parse_get_int(&core, A_surfxml_host_core);
 
-  xbt_assert0((A_surfxml_host_state == A_surfxml_host_state_ON) ||
+  xbt_assert((A_surfxml_host_state == A_surfxml_host_state_ON) ||
               (A_surfxml_host_state == A_surfxml_host_state_OFF),
               "Invalid state");
   if (A_surfxml_host_state == A_surfxml_host_state_ON)
@@ -134,8 +134,8 @@ static void cpu_im_add_traces_cpu(void)
     tmgr_trace_t trace = xbt_dict_get_or_null(traces_set_list, trace_name);
     cpu_Cas01_im_t host = surf_cpu_resource_by_name(elm);
 
-    xbt_assert1(host, "Host %s undefined", elm);
-    xbt_assert1(trace, "Trace %s undefined", trace_name);
+    xbt_assert(host, "Host %s undefined", elm);
+    xbt_assert(trace, "Trace %s undefined", trace_name);
 
     host->state_event =
         tmgr_history_add_trace(history, trace, 0.0, 0, host);
@@ -145,8 +145,8 @@ static void cpu_im_add_traces_cpu(void)
     tmgr_trace_t trace = xbt_dict_get_or_null(traces_set_list, trace_name);
     cpu_Cas01_im_t host = surf_cpu_resource_by_name(elm);
 
-    xbt_assert1(host, "Host %s undefined", elm);
-    xbt_assert1(trace, "Trace %s undefined", trace_name);
+    xbt_assert(host, "Host %s undefined", elm);
+    xbt_assert(trace, "Trace %s undefined", trace_name);
 
     host->power_event =
         tmgr_history_add_trace(history, trace, 0.0, 0, host);
@@ -345,7 +345,7 @@ static void cpu_im_update_actions_state(double now, double delta)
     //without losing the event ascending order (considering all CPU's)
        void **data;
     cpu_Cas01_im_t cpu;
-    xbt_dict_cursor_t cursor;
+    xbt_lib_cursor_t cursor;
     char *key;
     double smaller = -1;
     xbt_lib_foreach(host_lib, cursor, key, data){