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Change default CPU model to new Cas01_IM.
[simgrid.git]
/
examples
/
msg
/
Makefile.am
diff --git
a/examples/msg/Makefile.am
b/examples/msg/Makefile.am
index
2b148ce
..
cbd6597
100644
(file)
--- a/
examples/msg/Makefile.am
+++ b/
examples/msg/Makefile.am
@@
-59,7
+59,6
@@
TESTS = sendrecv/sendrecv_CLM03.tesh \
priority/priority.tesh \
properties/msg_prop.tesh \
trace/trace.tesh \
- masterslave/masterslave_cas01_im.tesh \
masterslave/masterslave_cpu_ti.tesh
if HAVE_GTNETS