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unspecialize the trace setup for CPUs
authorMartin Quinson <martin.quinson@loria.fr>
Sun, 31 Jan 2016 00:25:45 +0000 (01:25 +0100)
committerMartin Quinson <martin.quinson@loria.fr>
Sun, 31 Jan 2016 00:25:50 +0000 (01:25 +0100)
Every Cpu class exposes the same interface to set a state_trace or a
speed_trace, and every code that sets it use the interface.

As a result, every code setting the traces of a CPU is very similar
and should be factorized. For now, it's spread in the whole class tree.

Actually, the right place to do it is in the xml parser itself. The
symbol trace_connect_list_host_speed and friends should have remained
private to the xml parser.

I'll do so tomorrow, and also deal with the setup of link traces.

src/surf/cpu_cas01.cpp
src/surf/cpu_cas01.hpp
src/surf/cpu_interface.cpp
src/surf/cpu_interface.hpp
src/surf/host_ptask_L07.cpp
src/surf/host_ptask_L07.hpp

index 8db9a03..0523018 100644 (file)
@@ -118,22 +118,22 @@ void CpuCas01Model::addTraces()
   /* connect all traces relative to hosts */
   xbt_dict_foreach(trace_connect_list_host_avail, cursor, trace_name, elm) {
     tmgr_trace_t trace = (tmgr_trace_t) xbt_dict_get_or_null(traces_set_list, trace_name);
   /* connect all traces relative to hosts */
   xbt_dict_foreach(trace_connect_list_host_avail, cursor, trace_name, elm) {
     tmgr_trace_t trace = (tmgr_trace_t) xbt_dict_get_or_null(traces_set_list, trace_name);
-    CpuCas01 *host = static_cast<CpuCas01*>(sg_host_by_name(elm)->pimpl_cpu);
+    Cpu *cpu = sg_host_by_name(elm)->pimpl_cpu;
 
 
-    xbt_assert(host, "Host %s undefined", elm);
+    xbt_assert(cpu, "Host %s undefined", elm);
     xbt_assert(trace, "Trace %s undefined", trace_name);
 
     xbt_assert(trace, "Trace %s undefined", trace_name);
 
-    host->p_stateEvent = future_evt_set->add_trace(trace, 0.0, host);
+    cpu->set_state_trace(trace);
   }
 
   xbt_dict_foreach(trace_connect_list_host_speed, cursor, trace_name, elm) {
     tmgr_trace_t trace = (tmgr_trace_t) xbt_dict_get_or_null(traces_set_list, trace_name);
   }
 
   xbt_dict_foreach(trace_connect_list_host_speed, cursor, trace_name, elm) {
     tmgr_trace_t trace = (tmgr_trace_t) xbt_dict_get_or_null(traces_set_list, trace_name);
-    CpuCas01 *host = static_cast<CpuCas01*>(sg_host_by_name(elm)->pimpl_cpu);
+    Cpu *cpu = sg_host_by_name(elm)->pimpl_cpu;
 
 
-    xbt_assert(host, "Host %s undefined", elm);
+    xbt_assert(cpu, "Host %s undefined", elm);
     xbt_assert(trace, "Trace %s undefined", trace_name);
 
     xbt_assert(trace, "Trace %s undefined", trace_name);
 
-    host->p_speedEvent = future_evt_set->add_trace(trace, 0.0, host);
+    cpu->set_speed_trace(trace);
   }
 }
 
   }
 }
 
index 88c6386..59d9930 100644 (file)
@@ -42,7 +42,6 @@ public:
  ************/
 
 class CpuCas01 : public Cpu {
  ************/
 
 class CpuCas01 : public Cpu {
-  friend CpuCas01Model;
 public:
   CpuCas01(CpuCas01Model *model, simgrid::s4u::Host *host, xbt_dynar_t speedPeak,
         int pstate, double speedScale, tmgr_trace_t speedTrace, int core,
 public:
   CpuCas01(CpuCas01Model *model, simgrid::s4u::Host *host, xbt_dynar_t speedPeak,
         int pstate, double speedScale, tmgr_trace_t speedTrace, int core,
@@ -58,11 +57,6 @@ public:
 
 protected:
   void onSpeedChange() override;
 
 protected:
   void onSpeedChange() override;
-
-private:
-
-  tmgr_trace_iterator_t p_stateEvent = nullptr;
-  tmgr_trace_iterator_t p_speedEvent = nullptr;
 };
 
 /**********
 };
 
 /**********
index 5b31783..475e236 100644 (file)
@@ -245,6 +245,20 @@ int Cpu::getCore()
   return m_core;
 }
 
   return m_core;
 }
 
+void Cpu::set_state_trace(tmgr_trace_t trace)
+{
+  xbt_assert(p_stateEvent==NULL,"Cannot set a second state trace to Host %s", m_host->name().c_str());
+
+  p_stateEvent = future_evt_set->add_trace(trace, 0.0, this);
+}
+void Cpu::set_speed_trace(tmgr_trace_t trace)
+{
+  xbt_assert(p_speedEvent==NULL,"Cannot set a second speed trace to Host %s", m_host->name().c_str());
+
+  p_speedEvent = future_evt_set->add_trace(trace, 0.0, this);
+}
+
+
 /**********
  * Action *
  **********/
 /**********
  * Action *
  **********/
index a0d9860..27bcee0 100644 (file)
@@ -149,7 +149,6 @@ public:
   virtual void setPState(int pstate_index);
   virtual int  getPState();
 
   virtual void setPState(int pstate_index);
   virtual int  getPState();
 
-  void addTraces(void);
   simgrid::s4u::Host* getHost() { return m_host; }
 
 public:
   simgrid::s4u::Host* getHost() { return m_host; }
 
 public:
@@ -165,6 +164,12 @@ public:
   lmm_constraint_t *p_constraintCore=NULL;
   void **p_constraintCoreId=NULL;
 
   lmm_constraint_t *p_constraintCore=NULL;
   void **p_constraintCoreId=NULL;
 
+public:
+  void set_state_trace(tmgr_trace_t trace); /*< setup the trace file with states events (ON or OFF) */
+  void set_speed_trace(tmgr_trace_t trace); /*< setup the trace file with availability events (peak speed changes due to external load) */
+protected:
+  tmgr_trace_iterator_t p_stateEvent = nullptr;
+  tmgr_trace_iterator_t p_speedEvent = nullptr;
 };
 
 /**********
 };
 
 /**********
index 4e11d53..a66b508 100644 (file)
@@ -346,22 +346,22 @@ void HostL07Model::addTraces()
   /* Connect traces relative to cpu */
   xbt_dict_foreach(trace_connect_list_host_avail, cursor, trace_name, elm) {
     tmgr_trace_t trace = (tmgr_trace_t) xbt_dict_get_or_null(traces_set_list, trace_name);
   /* Connect traces relative to cpu */
   xbt_dict_foreach(trace_connect_list_host_avail, cursor, trace_name, elm) {
     tmgr_trace_t trace = (tmgr_trace_t) xbt_dict_get_or_null(traces_set_list, trace_name);
-    CpuL07 *host = static_cast<CpuL07*>(sg_host_by_name(elm)->pimpl_cpu);
+    Cpu *cpu = sg_host_by_name(elm)->pimpl_cpu;
 
 
-    xbt_assert(host, "Host %s undefined", elm);
+    xbt_assert(cpu, "Host %s undefined", elm);
     xbt_assert(trace, "Trace %s undefined", trace_name);
 
     xbt_assert(trace, "Trace %s undefined", trace_name);
 
-    host->p_stateEvent = future_evt_set->add_trace(trace, 0.0, host);
+    cpu->set_state_trace(trace);
   }
 
   xbt_dict_foreach(trace_connect_list_host_speed, cursor, trace_name, elm) {
     tmgr_trace_t trace = (tmgr_trace_t) xbt_dict_get_or_null(traces_set_list, trace_name);
   }
 
   xbt_dict_foreach(trace_connect_list_host_speed, cursor, trace_name, elm) {
     tmgr_trace_t trace = (tmgr_trace_t) xbt_dict_get_or_null(traces_set_list, trace_name);
-    CpuL07 *host = static_cast<CpuL07*>(sg_host_by_name(elm)->pimpl_cpu);
+    Cpu *cpu = sg_host_by_name(elm)->pimpl_cpu;
 
 
-    xbt_assert(host, "Host %s undefined", elm);
+    xbt_assert(cpu, "Host %s undefined", elm);
     xbt_assert(trace, "Trace %s undefined", trace_name);
 
     xbt_assert(trace, "Trace %s undefined", trace_name);
 
-    host->p_speedEvent = future_evt_set->add_trace(trace, 0.0, host);
+    cpu->set_speed_trace(trace);
   }
 
   /* Connect traces relative to network */
   }
 
   /* Connect traces relative to network */
index 3754b67..d811ddf 100644 (file)
@@ -93,9 +93,6 @@ public:
  ************/
 
 class CpuL07 : public Cpu {
  ************/
 
 class CpuL07 : public Cpu {
-  friend void HostL07Model::addTraces();
-  tmgr_trace_iterator_t p_stateEvent = nullptr;
-  tmgr_trace_iterator_t p_speedEvent = nullptr;
 public:
   CpuL07(CpuL07Model *model, simgrid::s4u::Host *host, xbt_dynar_t speedPeakList, int pstate,
                 double power_scale, tmgr_trace_t power_trace,
 public:
   CpuL07(CpuL07Model *model, simgrid::s4u::Host *host, xbt_dynar_t speedPeakList, int pstate,
                 double power_scale, tmgr_trace_t power_trace,