X-Git-Url: http://info.iut-bm.univ-fcomte.fr/pub/gitweb/simgrid.git/blobdiff_plain/7a9c73193ecafbb368417633205702fe2499bb83..0e12d6bf868db499b8e003f86b6f545741c63d83:/src/surf/cpu_cas01.cpp diff --git a/src/surf/cpu_cas01.cpp b/src/surf/cpu_cas01.cpp index 0a9533758b..6a00daf3d5 100644 --- a/src/surf/cpu_cas01.cpp +++ b/src/surf/cpu_cas01.cpp @@ -8,7 +8,6 @@ #include "cpu_ti.hpp" #include "maxmin_private.hpp" #include "simgrid/sg_config.h" -#include "src/surf/platform.hpp" XBT_LOG_NEW_DEFAULT_SUBCATEGORY(surf_cpu_cas, surf_cpu, "Logging specific to the SURF CPU IMPROVED module"); @@ -43,11 +42,11 @@ CpuCas01Model::CpuCas01Model() : simgrid::surf::CpuModel() int select = xbt_cfg_get_boolean(_sg_cfg_set, "cpu/maxmin_selective_update"); if (!strcmp(optim, "Full")) { - p_updateMechanism = UM_FULL; - m_selectiveUpdate = select; + updateMechanism_ = UM_FULL; + selectiveUpdate_ = select; } else if (!strcmp(optim, "Lazy")) { - p_updateMechanism = UM_LAZY; - m_selectiveUpdate = 1; + updateMechanism_ = UM_LAZY; + selectiveUpdate_ = 1; xbt_assert((select == 1) || (xbt_cfg_is_default_value @@ -59,24 +58,24 @@ CpuCas01Model::CpuCas01Model() : simgrid::surf::CpuModel() p_cpuRunningActionSetThatDoesNotNeedBeingChecked = new ActionList(); - p_maxminSystem = lmm_system_new(m_selectiveUpdate); + maxminSystem_ = lmm_system_new(selectiveUpdate_); if (getUpdateMechanism() == UM_LAZY) { - p_actionHeap = xbt_heap_new(8, NULL); - xbt_heap_set_update_callback(p_actionHeap, surf_action_lmm_update_index_heap); - p_modifiedSet = new ActionLmmList(); - p_maxminSystem->keep_track = p_modifiedSet; + actionHeap_ = xbt_heap_new(8, NULL); + xbt_heap_set_update_callback(actionHeap_, surf_action_lmm_update_index_heap); + modifiedSet_ = new ActionLmmList(); + maxminSystem_->keep_track = modifiedSet_; } } CpuCas01Model::~CpuCas01Model() { - lmm_system_free(p_maxminSystem); - p_maxminSystem = NULL; + lmm_system_free(maxminSystem_); + maxminSystem_ = NULL; - if (p_actionHeap) - xbt_heap_free(p_actionHeap); - delete p_modifiedSet; + if (actionHeap_) + xbt_heap_free(actionHeap_); + delete modifiedSet_; surf_cpu_model_pm = NULL; @@ -84,34 +83,29 @@ CpuCas01Model::~CpuCas01Model() } Cpu *CpuCas01Model::createCpu(simgrid::s4u::Host *host, xbt_dynar_t speedPeak, - int pstate, double speedScale, - tmgr_trace_t speedTrace, int core, - int initiallyOn, - tmgr_trace_t state_trace) + tmgr_trace_t speedTrace, int core, tmgr_trace_t state_trace) { xbt_assert(xbt_dynar_getfirst_as(speedPeak, double) > 0.0, "Speed has to be >0.0. Did you forget to specify the mandatory power attribute?"); xbt_assert(core > 0, "Invalid number of cores %d. Must be larger than 0", core); - Cpu *cpu = new CpuCas01(this, host, speedPeak, pstate, speedScale, speedTrace, core, initiallyOn, state_trace); + Cpu *cpu = new CpuCas01(this, host, speedPeak, speedTrace, core, state_trace); return cpu; } double CpuCas01Model::next_occuring_event_full(double /*now*/) { - return Model::shareResourcesMaxMin(getRunningActionSet(), p_maxminSystem, lmm_solve); + return Model::shareResourcesMaxMin(getRunningActionSet(), maxminSystem_, lmm_solve); } /************ * Resource * ************/ CpuCas01::CpuCas01(CpuCas01Model *model, simgrid::s4u::Host *host, xbt_dynar_t speedPeak, - int pstate, double speedScale, tmgr_trace_t speedTrace, int core, - int initiallyOn, tmgr_trace_t stateTrace) + tmgr_trace_t speedTrace, int core, tmgr_trace_t stateTrace) : Cpu(model, host, - lmm_constraint_new(model->getMaxminSystem(), this, core * speedScale * xbt_dynar_get_as(speedPeak, pstate, double)), - speedPeak, pstate, - core, xbt_dynar_get_as(speedPeak, pstate, double), speedScale, - initiallyOn) { + lmm_constraint_new(model->getMaxminSystem(), this, core * xbt_dynar_get_as(speedPeak, 0/*pstate*/, double)), + speedPeak, core, xbt_dynar_get_as(speedPeak, 0/*pstate*/, double)) +{ XBT_DEBUG("CPU create: peak=%f, pstate=%d", p_speed.peak, m_pstate); @@ -159,9 +153,6 @@ void CpuCas01::onSpeedChange() { void CpuCas01::apply_event(tmgr_trace_iterator_t event, double value) { - lmm_variable_t var = NULL; - lmm_element_t elem = NULL; - if (event == p_speed.event) { /* TODO (Hypervisor): do the same thing for constraint_core[i] */ xbt_assert(m_core == 1, "FIXME: add speed scaling code also for constraint_core[i]"); @@ -180,6 +171,8 @@ void CpuCas01::apply_event(tmgr_trace_iterator_t event, double value) turnOn(); } else { lmm_constraint_t cnst = getConstraint(); + lmm_variable_t var = NULL; + lmm_element_t elem = NULL; double date = surf_get_clock(); turnOff(); @@ -196,11 +189,10 @@ void CpuCas01::apply_event(tmgr_trace_iterator_t event, double value) } } tmgr_trace_event_unref(&p_stateEvent); + } else { xbt_die("Unknown event!\n"); } - - return; } CpuAction *CpuCas01::execution_start(double size)