X-Git-Url: http://info.iut-bm.univ-fcomte.fr/pub/gitweb/simgrid.git/blobdiff_plain/1b8f849b45ded567cf10c7da022447a775270a0e..756df47074b2d7b0721f234077f5ef8d75e13932:/src/mc/mc_dwarf.cpp diff --git a/src/mc/mc_dwarf.cpp b/src/mc/mc_dwarf.cpp index 9d30fcffe1..3886239296 100644 --- a/src/mc/mc_dwarf.cpp +++ b/src/mc/mc_dwarf.cpp @@ -16,19 +16,17 @@ #include #include -#include +#include "src/simgrid/util.hpp" #include #include -#include +#include "src/mc/mc_object_info.h" +#include "src/mc/mc_private.h" +#include "src/mc/mc_dwarf.hpp" -#include "mc_object_info.h" -#include "mc_private.h" -#include "mc_dwarf.hpp" - -#include "mc/Process.hpp" -#include "mc/ObjectInformation.hpp" -#include "mc/Variable.hpp" +#include "src/mc/Process.hpp" +#include "src/mc/ObjectInformation.hpp" +#include "src/mc/Variable.hpp" XBT_LOG_NEW_DEFAULT_SUBCATEGORY(mc_dwarf, mc, "DWARF processing"); @@ -134,7 +132,7 @@ enum class FormClass { RangeListPtr }; -XBT_PRIVATE +static TagClass classify_tag(int tag) { switch (tag) { @@ -193,7 +191,7 @@ TagClass classify_tag(int tag) * \param form The form (values taken from the DWARF spec) * \return An internal representation for the corresponding class * */ -XBT_PRIVATE +static FormClass classify_form(int form) { switch (form) { @@ -753,7 +751,7 @@ static std::unique_ptr MC_die_to_variable( uintptr_t base = (uintptr_t) info->base_address(); variable->address = (void *) (base + offset); } else { - simgrid::mc::LocationListEntry entry; + simgrid::dwarf::LocationListEntry entry; entry.expression = {expr, expr + len}; variable->location_list = { std::move(entry) }; } @@ -764,9 +762,8 @@ static std::unique_ptr MC_die_to_variable( case simgrid::dwarf::FormClass::LocListPtr: case simgrid::dwarf::FormClass::Constant: // Reference to location list: - mc_dwarf_location_list_init( - &variable->location_list, info, die, - &attr_location); + variable->location_list = simgrid::dwarf::location_list( + *info, attr_location); break; default: @@ -909,8 +906,8 @@ static void MC_dwarf_handle_scope_die(simgrid::mc::ObjectInformation* info, Dwar if (klass == simgrid::dwarf::TagClass::Subprogram) { Dwarf_Attribute attr_frame_base; if (dwarf_attr_integrate(die, DW_AT_frame_base, &attr_frame_base)) - mc_dwarf_location_list_init(&frame.frame_base, info, die, - &attr_frame_base); + frame.frame_base_location = simgrid::dwarf::location_list(*info, + attr_frame_base); } // Handle children: @@ -1152,7 +1149,7 @@ static void MC_post_process_types(simgrid::mc::ObjectInformation* info) /** \brief Finds informations about a given shared object/executable */ std::shared_ptr MC_find_object_info( - std::vector const& maps, const char *name) + std::vector const& maps, const char *name) { std::shared_ptr result = std::make_shared(); @@ -1197,3 +1194,80 @@ void MC_post_process_object_info(simgrid::mc::Process* process, simgrid::mc::Obj } } + +namespace simgrid { +namespace dwarf { + +/** Convert a DWARF register into a libunwind register + * + * DWARF and libunwind does not use the same convention for numbering the + * registers on some architectures. The function makes the necessary + * convertion. + */ +int dwarf_register_to_libunwind(int dwarf_register) +{ +#if defined(__x86_64__) + // It seems for this arch, DWARF and libunwind agree in the numbering: + return dwarf_register; +#elif defined(__i386__) + // Could't find the authoritative source of information for this. + // This is inspired from http://source.winehq.org/source/dlls/dbghelp/cpu_i386.c#L517. + switch (dwarf_register) { + case 0: + return UNW_X86_EAX; + case 1: + return UNW_X86_ECX; + case 2: + return UNW_X86_EDX; + case 3: + return UNW_X86_EBX; + case 4: + return UNW_X86_ESP; + case 5: + return UNW_X86_EBP; + case 6: + return UNW_X86_ESI; + case 7: + return UNW_X86_EDI; + case 8: + return UNW_X86_EIP; + case 9: + return UNW_X86_EFLAGS; + case 10: + return UNW_X86_CS; + case 11: + return UNW_X86_SS; + case 12: + return UNW_X86_DS; + case 13: + return UNW_X86_ES; + case 14: + return UNW_X86_FS; + case 15: + return UNW_X86_GS; + case 16: + return UNW_X86_ST0; + case 17: + return UNW_X86_ST1; + case 18: + return UNW_X86_ST2; + case 19: + return UNW_X86_ST3; + case 20: + return UNW_X86_ST4; + case 21: + return UNW_X86_ST5; + case 22: + return UNW_X86_ST6; + case 23: + return UNW_X86_ST7; + default: + xbt_die("Bad/unknown register number."); + } +#else +#error This architecture is not supported yet for DWARF expression evaluation. +#endif +} + +} +}