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objectifies the Future Event Set of trace events
[simgrid.git] / src / surf / cpu_cas01.cpp
index 9893b57..676e706 100644 (file)
@@ -8,6 +8,7 @@
 #include "cpu_ti.hpp"
 #include "maxmin_private.hpp"
 #include "simgrid/sg_config.h"
+#include "src/surf/platform.hpp"
 
 XBT_LOG_NEW_DEFAULT_SUBCATEGORY(surf_cpu_cas, surf_cpu,
                                 "Logging specific to the SURF CPU IMPROVED module");
@@ -32,7 +33,9 @@ void surf_cpu_model_init_Cas01()
   surf_cpu_model_vm  = new simgrid::surf::CpuCas01Model();
   xbt_dynar_push(all_existing_models, &surf_cpu_model_vm);
 
-  sg_platf_postparse_add_cb(simgrid::surf::cpu_add_traces);
+  simgrid::surf::on_postparse.connect([]() {
+    surf_cpu_model_pm->addTraces();
+  });
 }
 
 namespace simgrid {
@@ -84,7 +87,7 @@ CpuCas01Model::~CpuCas01Model()
   delete p_cpuRunningActionSetThatDoesNotNeedBeingChecked;
 }
 
-Cpu *CpuCas01Model::createCpu(simgrid::Host *host, xbt_dynar_t speedPeak,
+Cpu *CpuCas01Model::createCpu(simgrid::s4u::Host *host, xbt_dynar_t speedPeak,
                                  int pstate, double speedScale,
                           tmgr_trace_t speedTrace, int core,
                           int initiallyOn,
@@ -120,7 +123,7 @@ void CpuCas01Model::addTraces()
     xbt_assert(host, "Host %s undefined", elm);
     xbt_assert(trace, "Trace %s undefined", trace_name);
 
-    host->setStateEvent(tmgr_history_add_trace(history, trace, 0.0, 0, host));
+    host->setStateEvent(future_evt_set->add_trace(trace, 0.0, 0, host));
   }
 
   xbt_dict_foreach(trace_connect_list_power, cursor, trace_name, elm) {
@@ -130,14 +133,14 @@ void CpuCas01Model::addTraces()
     xbt_assert(host, "Host %s undefined", elm);
     xbt_assert(trace, "Trace %s undefined", trace_name);
 
-    host->setPowerEvent(tmgr_history_add_trace(history, trace, 0.0, 0, host));
+    host->setPowerEvent(future_evt_set->add_trace(trace, 0.0, 0, host));
   }
 }
 
 /************
  * Resource *
  ************/
-CpuCas01::CpuCas01(CpuCas01Model *model, simgrid::Host *host, xbt_dynar_t speedPeak,
+CpuCas01::CpuCas01(CpuCas01Model *model, simgrid::s4u::Host *host, xbt_dynar_t speedPeak,
                          int pstate, double speedScale, tmgr_trace_t speedTrace, int core,
                          int initiallyOn, tmgr_trace_t stateTrace)
 : Cpu(model, host,
@@ -151,10 +154,10 @@ CpuCas01::CpuCas01(CpuCas01Model *model, simgrid::Host *host, xbt_dynar_t speedP
 
   m_core = core;
   if (speedTrace)
-    p_speedEvent = tmgr_history_add_trace(history, speedTrace, 0.0, 0, this);
+    p_speedEvent = future_evt_set->add_trace(speedTrace, 0.0, 0, this);
 
   if (stateTrace)
-    p_stateEvent = tmgr_history_add_trace(history, stateTrace, 0.0, 0, this);
+    p_stateEvent = future_evt_set->add_trace(stateTrace, 0.0, 0, this);
 }
 
 CpuCas01::~CpuCas01()
@@ -163,12 +166,12 @@ CpuCas01::~CpuCas01()
     xbt_dynar_free(&p_speedPeakList);
 }
 
-void CpuCas01::setStateEvent(tmgr_trace_event_t stateEvent)
+void CpuCas01::setStateEvent(tmgr_trace_iterator_t stateEvent)
 {
   p_stateEvent = stateEvent;
 }
 
-void CpuCas01::setPowerEvent(tmgr_trace_event_t powerEvent)
+void CpuCas01::setPowerEvent(tmgr_trace_iterator_t powerEvent)
 {
   p_speedEvent = powerEvent;
 }
@@ -201,14 +204,14 @@ void CpuCas01::onSpeedChange() {
        Cpu::onSpeedChange();
 }
 
-void CpuCas01::updateState(tmgr_trace_event_t event_type, double value, double date)
+void CpuCas01::updateState(tmgr_trace_iterator_t event_type, double value, double date)
 {
   lmm_variable_t var = NULL;
   lmm_element_t elem = NULL;
 
   if (event_type == p_speedEvent) {
-       /* TODO (Hypervisor): do the same thing for constraint_core[i] */
-       xbt_assert(m_core == 1, "FIXME: add speed scaling code also for constraint_core[i]");
+    /* TODO (Hypervisor): do the same thing for constraint_core[i] */
+    xbt_assert(m_core == 1, "FIXME: add speed scaling code also for constraint_core[i]");
 
     m_speedScale = value;
     onSpeedChange();
@@ -216,7 +219,7 @@ void CpuCas01::updateState(tmgr_trace_event_t event_type, double value, double d
     if (tmgr_trace_event_free(event_type))
       p_speedEvent = NULL;
   } else if (event_type == p_stateEvent) {
-       /* TODO (Hypervisor): do the same thing for constraint_core[i] */
+    /* TODO (Hypervisor): do the same thing for constraint_core[i] */
     xbt_assert(m_core == 1, "FIXME: add state change code also for constraint_core[i]");
 
     if (value > 0) {
@@ -254,7 +257,7 @@ CpuAction *CpuCas01::execute(double size)
 
   XBT_IN("(%s,%g)", getName(), size);
   CpuCas01Action *action = new CpuCas01Action(getModel(), size, isOff(),
-                                                             m_speedScale * m_speedPeak, getConstraint());
+      m_speedScale * m_speedPeak, getConstraint());
 
   XBT_OUT();
   return action;
@@ -267,7 +270,7 @@ CpuAction *CpuCas01::sleep(double duration)
 
   XBT_IN("(%s,%g)", getName(), duration);
   CpuCas01Action *action = new CpuCas01Action(getModel(), 1.0, isOff(),
-                                                      m_speedScale * m_speedPeak, getConstraint());
+      m_speedScale * m_speedPeak, getConstraint());
 
 
   // FIXME: sleep variables should not consume 1.0 in lmm_expand
@@ -276,13 +279,13 @@ CpuAction *CpuCas01::sleep(double duration)
   if (duration == NO_MAX_DURATION) {
     /* Move to the *end* of the corresponding action set. This convention
        is used to speed up update_resource_state  */
-       action->getStateSet()->erase(action->getStateSet()->iterator_to(*action));
+    action->getStateSet()->erase(action->getStateSet()->iterator_to(*action));
     action->p_stateSet = static_cast<CpuCas01Model*>(getModel())->p_cpuRunningActionSetThatDoesNotNeedBeingChecked;
     action->getStateSet()->push_back(*action);
   }
 
   lmm_update_variable_weight(getModel()->getMaxminSystem(),
-                             action->getVariable(), 0.0);
+      action->getVariable(), 0.0);
   if (getModel()->getUpdateMechanism() == UM_LAZY) {     // remove action from the heap
     action->heapRemove(getModel()->getActionHeap());
     // this is necessary for a variable with weight 0 since such