/* Validating XML processor for surfxml.dtd.
- * Generated 2005/01/09 15:25:17.
+ * Generated 2005/02/13 20:04:21.
*
* This program was generated with the FleXML XML processor generator,
- * (Id: flexml.pl,v 1.35 2005/01/05 06:29:58 legranda Exp).
+ * (Id: flexml.pl,v 1.39 2005/02/13 18:12:19 legranda Exp).
* Copyright © 1999 Kristoffer Rose. All rights reserved.
*
* You can redistribute and/or modify this program provided the following
/* Version strings. */
const char rcs_flexml_skeleton[] =
- "$" "Id: skel,v 1.19 2005/01/05 18:49:27 legranda Exp $";
+ "$" "Id: skel,v 1.24 2005/02/10 11:42:39 mquinson Exp $";
const char rcs_flexml[] =
- "$" "Id: flexml.pl,v 1.35 2005/01/05 06:29:58 legranda Exp $";
+ "$" "Id: flexml.pl,v 1.39 2005/02/13 18:12:19 legranda Exp $";
/* ANSI headers. */
#include <unistd.h>
/* Generated definitions. */
#define FLEXML_yylineno
-#define FLEXML_BUFFERSTACKSIZE 10000000
+#define FLEXML_BUFFERSTACKSIZE 1000000
/* XML processor api. */
-#include "surfxml.h"
+#include "surf/surfxml.h"
/* FleXML-provided data. */
const char* pcdata;
AT_route_impact_on_src A_route_impact_on_src;
AT_route_src A_route_src;
AT_network_link_latency_file A_network_link_latency_file;
+AT_cpu_max_outgoing_rate A_cpu_max_outgoing_rate;
AT_route_impact_on_dst_with_other_send A_route_impact_on_dst_with_other_send;
AT_cpu_interference_send_recv A_cpu_interference_send_recv;
AT_cpu_availability A_cpu_availability;
#define FAIL return fail
static int fail(const char*, ...);
+const char * parse_err_msg(void);
/* Text buffer stack handling. */
char bufferstack[FLEXML_BUFFERSTACKSIZE];
char* limit = bufferstack + FLEXML_BUFFERSTACKSIZE;
typedef struct BufferLast_s {
- struct BufferLast_s *old; char* saved; char new[1];
+ struct BufferLast_s *old; char* saved; char new1[1];
} BufferLast;
BufferLast* last = (BufferLast*)0;
char* next = bufferstack;
while (++s<e) {
if (isspace(*s)) { BUFFERPUTC(' '); while (isspace(*s)) ++s; }
else BUFFERPUTC(*s);
- }
+ }
BUFFERDONE;
}
assert(next < limit);
l->old = last;
l->saved = p;
- next = l->new;
+ next = l->new1;
last = l;
}
%%
/* Bypass Flex's default INITIAL state and begin by parsing the XML prolog. */
- SET(PROLOG);
+ SET(PROLOG);
/* FleXML_init */
- if(!statenames) statenames=calloc(IMPOSSIBLE,sizeof(char*));
+ next = bufferstack;
+ if(!statenames) {statenames= (const char **)calloc(IMPOSSIBLE,sizeof(char*));
statenames[PROLOG] = NULL;
statenames[DOCTYPE] = NULL;
statenames[EPILOG] = NULL;
statenames[ROOT_argument] = NULL;
statenames[AL_argument] = NULL;
statenames[E_argument] = "argument";
-
+ }
/* COMMENTS and PIs: handled uniformly for efficiency. */
<ROOT_platform_description,AL_platform_description,S_platform_description,S_platform_description_1,S_platform_description_2,E_platform_description,ROOT_include,AL_include,S_include,S_include_1,S_include_2,E_include,ROOT_cpu,AL_cpu,E_cpu,ROOT_network_link,AL_network_link,E_network_link,ROOT_route,AL_route,S_route,S_route_1,S_route_2,E_route,ROOT_route_element,AL_route_element,E_route_element,ROOT_process,AL_process,S_process,S_process_1,S_process_2,E_process,ROOT_argument,AL_argument,E_argument,PROLOG,DOCTYPE,EPILOG>{
/* PROLOG: determine root element and process it. */
<PROLOG>{
- "<?xml"({S}version{Eq}(\'{VersionNum}\'|\"{VersionNum}\"))?"?>" SET(DOCTYPE);
+ "<?xml"({S}version{Eq}(\'{VersionNum}\'|\"{VersionNum}\"))?({S}encoding{Eq}(\'[^']*\'|\"[^"]*\"))?"?>" SET(DOCTYPE);
"<?xml"[^>]*">" FAIL("Bad declaration %s.",yytext);
}
A_cpu_interference_send = "1.0";
A_cpu_interference_recv = "1.0";
A_cpu_interference_send_recv = "1.0";
+ A_cpu_max_outgoing_rate = "-1.0";
ENTER(AL_cpu);
}
"interference_send_recv"{Eq}\' ENTER(VALUE1); BUFFERSET(A_cpu_interference_send_recv);
"interference_send_recv"{Eq}\" ENTER(VALUE2); BUFFERSET(A_cpu_interference_send_recv);
+ "max_outgoing_rate"{Eq}\' ENTER(VALUE1); BUFFERSET(A_cpu_max_outgoing_rate);
+ "max_outgoing_rate"{Eq}\" ENTER(VALUE2); BUFFERSET(A_cpu_max_outgoing_rate);
+
">" {
if (!A_cpu_name) FAIL("Required attribute `name' not set for `cpu' element.");
if (!A_cpu_power) FAIL("Required attribute `power' not set for `cpu' element.");
/* EPILOG: after the root element. */
<EPILOG>{
- . FAIL("Unexpected character `%c' after document.", yytext[0]);
+ . {SET(PROLOG); yyless(0); return -1;}
<<EOF>> SUCCEED;
}
<CDATA>{
"]""]>" LEAVE;
- "]""]" BUFFERPUTC(yytext[0]); BUFFERPUTC(yytext[1]);
+ /* "]""]" BUFFERPUTC(yytext[0]); BUFFERPUTC(yytext[1]); */
. BUFFERPUTC(yytext[0]);
<<EOF>> FAIL("EOF in CDATA section.");
}
/* Impossible rules to avoid warnings from flex(1). */
-
-<INITIAL,IMPOSSIBLE>{
- .|[\n] FAIL("The Impossible Happened: INITIAL or IMPOSSIBLE state entered?");
+ /* Ideally, this should be replaced by code in flexml.pl that
+ generates just the states not covered by other rules. */
+<*>{
+ .|[\n] FAIL("Syntax error on character `%c'.", yytext[0]);
}
%%
}
#endif
+enum {flexml_max_err_msg_size = 512};
+
+static char flexml_err_msg[flexml_max_err_msg_size];
+const char * parse_err_msg()
+{
+ return flexml_err_msg;
+}
+
+static void reset_parse_err_msg()
+{
+ flexml_err_msg[0] = '\0';
+}
+
static int fail(const char* fmt, ...)
{
- va_list ap; va_start(ap, fmt);
+ int chars_left, used;
+ va_list ap; va_start(ap, fmt);
#ifdef FLEXML_yylineno
- fprintf(stderr, "Invalid XML (XML input line %d, state %d): ", yylineno, YY_START);
+ used = sprintf(flexml_err_msg,
+ "Invalid XML (XML input line %d, state %d): ",
+ yylineno, YY_START);
#else
- fprintf(stderr, "Invalid XML (state %d): ",YY_START);
+ used = sprintf(flexml_err_msg,
+ "Invalid XML (state %d): ",
+ YY_START);
#endif
- vfprintf(stderr, fmt, ap);
- fprintf(stderr, "\n");
- va_end(ap);
- return 1;
+ chars_left = flexml_max_err_msg_size - used - 1;
+ vsnprintf(flexml_err_msg + used, chars_left, fmt, ap);
+ va_end(ap);
+
+#ifndef FLEXML_quiet_parser
+ /* print directly to sdterr */
+ fprintf(stderr, "%s\n", flexml_err_msg);
+ flexml_err_msg[0] = '\0';
+#endif
+
+ return 1;
}
