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model-checker : fix visited states reduction with comm determinism verification
[simgrid.git] / src / mc / mc_state.c
1 /* Copyright (c) 2008-2014. The SimGrid Team.
2  * All rights reserved.                                                     */
3
4 /* This program is free software; you can redistribute it and/or modify it
5  * under the terms of the license (GNU LGPL) which comes with this package. */
6
7 #include "../simix/smx_private.h"
8 #include "xbt/fifo.h"
9 #include "mc_private.h"
10
11 /**
12  * \brief Creates a state data structure used by the exploration algorithm
13  */
14 mc_state_t MC_state_new()
15 {
16   mc_state_t state = NULL;
17
18   state = xbt_new0(s_mc_state_t, 1);
19   state->max_pid = simix_process_maxpid;
20   state->proc_status = xbt_new0(s_mc_procstate_t, state->max_pid);
21   state->system_state = NULL;
22   state->num = ++mc_stats->expanded_states;
23
24   return state;
25 }
26
27 /**
28  * \brief Deletes a state data structure
29  * \param trans The state to be deleted
30  */
31 void MC_state_delete(mc_state_t state)
32 {
33   if (state->system_state)
34     MC_free_snapshot(state->system_state);
35   xbt_free(state->proc_status);
36   xbt_free(state);
37 }
38
39 void MC_state_interleave_process(mc_state_t state, smx_process_t process)
40 {
41   state->proc_status[process->pid].state = MC_INTERLEAVE;
42   state->proc_status[process->pid].interleave_count = 0;
43 }
44
45 void MC_state_remove_interleave_process(mc_state_t state, smx_process_t process)
46 {
47   if (state->proc_status[process->pid].state == MC_INTERLEAVE)
48     state->proc_status[process->pid].state = MC_DONE;
49 }
50
51 unsigned int MC_state_interleave_size(mc_state_t state)
52 {
53   unsigned int i, size = 0;
54
55   for (i = 0; i < state->max_pid; i++) {
56     if ((state->proc_status[i].state == MC_INTERLEAVE)
57         || (state->proc_status[i].state == MC_MORE_INTERLEAVE))
58       size++;
59   }
60
61   return size;
62 }
63
64 int MC_state_process_is_done(mc_state_t state, smx_process_t process)
65 {
66   return state->proc_status[process->pid].state == MC_DONE ? TRUE : FALSE;
67 }
68
69 void MC_state_set_executed_request(mc_state_t state, smx_simcall_t req,
70                                    int value)
71 {
72   state->executed_req = *req;
73   state->req_num = value;
74   smx_process_t process = NULL;
75   mc_procstate_t procstate = NULL;
76
77   /* The waitany and testany request are transformed into a wait or test request over the
78    * corresponding communication action so it can be treated later by the dependence
79    * function. */
80   switch (req->call) {
81   case SIMCALL_COMM_WAITANY:
82     state->internal_req.call = SIMCALL_COMM_WAIT;
83     state->internal_req.issuer = req->issuer;
84     state->internal_comm =
85         *xbt_dynar_get_as(simcall_comm_waitany__get__comms(req), value,
86                           smx_action_t);
87     simcall_comm_wait__set__comm(&state->internal_req, &state->internal_comm);
88     simcall_comm_wait__set__timeout(&state->internal_req, 0);
89     break;
90
91   case SIMCALL_COMM_TESTANY:
92     state->internal_req.call = SIMCALL_COMM_TEST;
93     state->internal_req.issuer = req->issuer;
94
95     if (value > 0)
96       state->internal_comm =
97           *xbt_dynar_get_as(simcall_comm_testany__get__comms(req), value,
98                             smx_action_t);
99
100     simcall_comm_test__set__comm(&state->internal_req, &state->internal_comm);
101     simcall_comm_test__set__result(&state->internal_req, value);
102     break;
103
104   case SIMCALL_COMM_WAIT:
105     state->internal_req = *req;
106     state->internal_comm = *(simcall_comm_wait__get__comm(req));
107     simcall_comm_wait__set__comm(&state->executed_req, &state->internal_comm);
108     simcall_comm_wait__set__comm(&state->internal_req, &state->internal_comm);
109     break;
110
111   case SIMCALL_COMM_TEST:
112     state->internal_req = *req;
113     state->internal_comm = *simcall_comm_test__get__comm(req);
114     simcall_comm_test__set__comm(&state->executed_req, &state->internal_comm);
115     simcall_comm_test__set__comm(&state->internal_req, &state->internal_comm);
116     break;
117
118   case SIMCALL_MC_RANDOM:
119     state->internal_req = *req;
120     if (value != simcall_mc_random__get__max(req)) {
121       xbt_swag_foreach(process, simix_global->process_list) {
122         procstate = &state->proc_status[process->pid];
123         if (process->pid == req->issuer->pid) {
124           procstate->state = MC_MORE_INTERLEAVE;
125           break;
126         }
127       }
128     }
129     break;
130
131   default:
132     state->internal_req = *req;
133     break;
134   }
135 }
136
137 smx_simcall_t MC_state_get_executed_request(mc_state_t state, int *value)
138 {
139   *value = state->req_num;
140   return &state->executed_req;
141 }
142
143 smx_simcall_t MC_state_get_internal_request(mc_state_t state)
144 {
145   return &state->internal_req;
146 }
147
148 smx_simcall_t MC_state_get_request(mc_state_t state, int *value)
149 {
150   smx_process_t process = NULL;
151   mc_procstate_t procstate = NULL;
152   unsigned int start_count;
153   smx_action_t act = NULL;
154
155   xbt_swag_foreach(process, simix_global->process_list) {
156     procstate = &state->proc_status[process->pid];
157
158     if (procstate->state == MC_INTERLEAVE
159         || procstate->state == MC_MORE_INTERLEAVE) {
160       if (MC_process_is_enabled(process)) {
161         switch (process->simcall.call) {
162         case SIMCALL_COMM_WAITANY:
163           *value = -1;
164           while (procstate->interleave_count <
165                  xbt_dynar_length(simcall_comm_waitany__get__comms
166                                   (&process->simcall))) {
167             if (MC_request_is_enabled_by_idx
168                 (&process->simcall, procstate->interleave_count++)) {
169               *value = procstate->interleave_count - 1;
170               break;
171             }
172           }
173
174           if (procstate->interleave_count >=
175               xbt_dynar_length(simcall_comm_waitany__get__comms
176                                (&process->simcall)))
177             procstate->state = MC_DONE;
178
179           if (*value != -1)
180             return &process->simcall;
181
182           break;
183
184         case SIMCALL_COMM_TESTANY:
185           start_count = procstate->interleave_count;
186           *value = -1;
187           while (procstate->interleave_count <
188                  xbt_dynar_length(simcall_comm_testany__get__comms
189                                   (&process->simcall))) {
190             if (MC_request_is_enabled_by_idx
191                 (&process->simcall, procstate->interleave_count++)) {
192               *value = procstate->interleave_count - 1;
193               break;
194             }
195           }
196
197           if (procstate->interleave_count >=
198               xbt_dynar_length(simcall_comm_testany__get__comms
199                                (&process->simcall)))
200             procstate->state = MC_DONE;
201
202           if (*value != -1 || start_count == 0)
203             return &process->simcall;
204
205           break;
206
207         case SIMCALL_COMM_WAIT:
208           act = simcall_comm_wait__get__comm(&process->simcall);
209           if (act->comm.src_proc && act->comm.dst_proc) {
210             *value = 0;
211           } else {
212             if (act->comm.src_proc == NULL && act->comm.type == SIMIX_COMM_READY
213                 && act->comm.detached == 1)
214               *value = 0;
215             else
216               *value = -1;
217           }
218           procstate->state = MC_DONE;
219           return &process->simcall;
220
221           break;
222
223         case SIMCALL_MC_RANDOM:
224           if (procstate->state == MC_INTERLEAVE)
225             *value = 0;
226           else {
227             if (state->req_num < simcall_mc_random__get__max(&process->simcall))
228               *value = state->req_num + 1;
229           }
230           procstate->state = MC_DONE;
231           return &process->simcall;
232           break;
233
234         default:
235           procstate->state = MC_DONE;
236           *value = 0;
237           return &process->simcall;
238           break;
239         }
240       }
241     }
242   }
243
244   return NULL;
245 }