src/mc/mc_state.c

   1 /* Copyright (c) 2008-2014. The SimGrid Team.
   2  * All rights reserved.                                                     */
   3
   4 /* This program is free software; you can redistribute it and/or modify it
   5  * under the terms of the license (GNU LGPL) which comes with this package. */
   6
   7 #include "../simix/smx_private.h"
   8 #include "xbt/fifo.h"
   9 #include "mc_private.h"
  10
  11 /**
  12  * \brief Creates a state data structure used by the exploration algorithm
  13  */
  14 mc_state_t MC_state_new()
  15 {
  16   mc_state_t state = NULL;
  17
  18   state = xbt_new0(s_mc_state_t, 1);
  19   state->max_pid = simix_process_maxpid;
  20   state->proc_status = xbt_new0(s_mc_procstate_t, state->max_pid);
  21   state->system_state = NULL;
  22   state->num = ++mc_stats->expanded_states;
  23
  24   return state;
  25 }
  26
  27 /**
  28  * \brief Deletes a state data structure
  29  * \param trans The state to be deleted
  30  */
  31 void MC_state_delete(mc_state_t state)
  32 {
  33   if(state->system_state)
  34     MC_free_snapshot(state->system_state);
  35   xbt_free(state->proc_status);
  36   xbt_free(state);
  37 }
  38
  39 void MC_state_interleave_process(mc_state_t state, smx_process_t process)
  40 {
  41   state->proc_status[process->pid].state = MC_INTERLEAVE;
  42   state->proc_status[process->pid].interleave_count = 0;
  43 }
  44
  45 void MC_state_remove_interleave_process(mc_state_t state, smx_process_t process)
  46 {
  47   if(state->proc_status[process->pid].state == MC_INTERLEAVE)
  48     state->proc_status[process->pid].state = MC_DONE;
  49 }
  50
  51 unsigned int MC_state_interleave_size(mc_state_t state)
  52 {
  53   unsigned int i, size=0;
  54
  55   for(i=0; i < state->max_pid; i++){
  56     if((state->proc_status[i].state == MC_INTERLEAVE) || (state->proc_status[i].state == MC_MORE_INTERLEAVE))
  57       size++;
  58   }
  59
  60   return size;
  61 }
  62
  63 int MC_state_process_is_done(mc_state_t state, smx_process_t process){
  64   return state->proc_status[process->pid].state == MC_DONE ? TRUE : FALSE;
  65 }
  66
  67 void MC_state_set_executed_request(mc_state_t state, smx_simcall_t req, int value)
  68 {
  69   state->executed_req = *req;
  70   state->req_num = value;
  71   smx_process_t process = NULL;
  72   mc_procstate_t procstate = NULL;
  73
  74   /* The waitany and testany request are transformed into a wait or test request over the
  75    * corresponding communication action so it can be treated later by the dependence
  76    * function. */
  77   switch(req->call){
  78     case SIMCALL_COMM_WAITANY:
  79       state->internal_req.call = SIMCALL_COMM_WAIT;
  80       state->internal_req.issuer = req->issuer;
  81       state->internal_comm = *xbt_dynar_get_as(simcall_comm_waitany__get__comms(req), value, smx_action_t);
  82       simcall_comm_wait__set__comm(&state->internal_req, &state->internal_comm);
  83       simcall_comm_wait__set__timeout(&state->internal_req, 0);
  84       break;
  85
  86     case SIMCALL_COMM_TESTANY:
  87       state->internal_req.call = SIMCALL_COMM_TEST;
  88       state->internal_req.issuer = req->issuer;
  89
  90       if(value > 0)
  91         state->internal_comm = *xbt_dynar_get_as(simcall_comm_testany__get__comms(req), value, smx_action_t);
  92
  93       simcall_comm_test__set__comm(&state->internal_req, &state->internal_comm);
  94       simcall_comm_test__set__result(&state->internal_req, value);
  95       break;
  96
  97     case SIMCALL_COMM_WAIT:
  98       state->internal_req = *req;
  99       state->internal_comm = *(simcall_comm_wait__get__comm(req));
 100       simcall_comm_wait__set__comm(&state->executed_req, &state->internal_comm);
 101       simcall_comm_wait__set__comm(&state->internal_req, &state->internal_comm);
 102       break;
 103
 104     case SIMCALL_COMM_TEST:
 105       state->internal_req = *req;
 106       state->internal_comm = *simcall_comm_test__get__comm(req);
 107       simcall_comm_test__set__comm(&state->executed_req, &state->internal_comm);
 108       simcall_comm_test__set__comm(&state->internal_req, &state->internal_comm);
 109       break;
 110
 111     case SIMCALL_MC_RANDOM:
 112       state->internal_req = *req;
 113       if(value != simcall_mc_random__get__max(req)){
 114         xbt_swag_foreach(process, simix_global->process_list){
 115           procstate = &state->proc_status[process->pid];
 116           if(process->pid == req->issuer->pid){
 117             procstate->state = MC_MORE_INTERLEAVE;
 118             break;
 119           }
 120         }
 121       }
 122       break;
 123
 124     default:
 125       state->internal_req = *req;
 126       break;
 127   }
 128 }
 129
 130 smx_simcall_t MC_state_get_executed_request(mc_state_t state, int *value)
 131 {
 132   *value = state->req_num;
 133   return &state->executed_req;
 134 }
 135
 136 smx_simcall_t MC_state_get_internal_request(mc_state_t state)
 137 {
 138   return &state->internal_req;
 139 }
 140
 141 smx_simcall_t MC_state_get_request(mc_state_t state, int *value)
 142 {
 143   smx_process_t process = NULL;
 144   mc_procstate_t procstate = NULL;
 145   unsigned int start_count;
 146   smx_action_t act = NULL;
 147
 148   xbt_swag_foreach(process, simix_global->process_list){
 149     procstate = &state->proc_status[process->pid];
 150
 151     if(procstate->state == MC_INTERLEAVE || procstate->state == MC_MORE_INTERLEAVE){
 152       if(MC_process_is_enabled(process)){
 153         switch(process->simcall.call){
 154           case SIMCALL_COMM_WAITANY:
 155             *value = -1;
 156             while(procstate->interleave_count < xbt_dynar_length(simcall_comm_waitany__get__comms(&process->simcall))){
 157               if(MC_request_is_enabled_by_idx(&process->simcall, procstate->interleave_count++)){
 158                 *value = procstate->interleave_count-1;
 159                 break;
 160               }
 161             }
 162
 163             if(procstate->interleave_count >= xbt_dynar_length(simcall_comm_waitany__get__comms(&process->simcall)))
 164               procstate->state = MC_DONE;
 165
 166             if(*value != -1)
 167               return &process->simcall;
 168
 169             break;
 170
 171           case SIMCALL_COMM_TESTANY:
 172             start_count = procstate->interleave_count;
 173             *value = -1;
 174             while(procstate->interleave_count < xbt_dynar_length(simcall_comm_testany__get__comms(&process->simcall))){
 175               if(MC_request_is_enabled_by_idx(&process->simcall, procstate->interleave_count++)){
 176                 *value = procstate->interleave_count - 1;
 177                 break;
 178               }
 179             }
 180
 181             if(procstate->interleave_count >= xbt_dynar_length(simcall_comm_testany__get__comms(&process->simcall)))
 182               procstate->state = MC_DONE;
 183
 184             if(*value != -1 || start_count == 0)
 185               return &process->simcall;
 186
 187             break;
 188
 189           case SIMCALL_COMM_WAIT:
 190             act = simcall_comm_wait__get__comm(&process->simcall);
 191             if(act->comm.src_proc && act->comm.dst_proc){
 192               *value = 0;
 193             }else{
 194               if(act->comm.src_proc == NULL && act->comm.type == SIMIX_COMM_READY && act->comm.detached == 1)
 195                 *value = 0;
 196               else
 197                 *value = -1;
 198             }
 199             procstate->state = MC_DONE;
 200             return &process->simcall;
 201
 202             break;
 203
 204           case SIMCALL_MC_RANDOM:
 205             if(procstate->state == MC_INTERLEAVE)
 206               *value = 0;
 207             else{
 208               if(state->req_num < simcall_mc_random__get__max(&process->simcall))
 209                 *value = state->req_num + 1;
 210             }
 211             procstate->state = MC_DONE;
 212             return &process->simcall;
 213             break;
 214
 215           default:
 216             procstate->state = MC_DONE;
 217             *value = 0;
 218             return &process->simcall;
 219             break;
 220         }
 221       }
 222     }
 223   }
 224
 225   return NULL;
 226 }