src/surf/cpu_im.c

   1 /* Copyright (c) 2009, 2010. The SimGrid Team.
   2  * All rights reserved.                                                     */
   3
   4 /* This program is free software; you can redistribute it and/or modify it
   5  * under the terms of the license (GNU LGPL) which comes with this package. */
   6
   7 #include "surf_private.h"
   8
   9 #undef GENERIC_LMM_ACTION
  10 #undef GENERIC_ACTION
  11 #undef ACTION_GET_CPU
  12 #define GENERIC_LMM_ACTION(action) action->generic_lmm_action
  13 #define GENERIC_ACTION(action) GENERIC_LMM_ACTION(action).generic_action
  14 #define ACTION_GET_CPU(action) ((surf_action_cpu_Cas01_im_t) action)->cpu
  15
  16 typedef struct surf_action_cpu_cas01_im {
  17   s_surf_action_lmm_t generic_lmm_action;
  18   s_xbt_swag_hookup_t cpu_list_hookup;
  19   int index_heap;
  20   void *cpu;
  21 } s_surf_action_cpu_Cas01_im_t, *surf_action_cpu_Cas01_im_t;
  22
  23 typedef struct cpu_Cas01_im {
  24   s_surf_resource_t generic_resource;
  25   s_xbt_swag_hookup_t modified_cpu_hookup;
  26   double power_peak;
  27   double power_scale;
  28   tmgr_trace_event_t power_event;
  29   int core;
  30   e_surf_resource_state_t state_current;
  31   tmgr_trace_event_t state_event;
  32   lmm_constraint_t constraint;
  33   xbt_swag_t action_set;
  34   double last_update;
  35 } s_cpu_Cas01_im_t, *cpu_Cas01_im_t;
  36
  37 XBT_LOG_NEW_DEFAULT_SUBCATEGORY(surf_cpu_im, surf,
  38                                 "Logging specific to the SURF CPU IMPROVED module");
  39
  40
  41 lmm_system_t cpu_im_maxmin_system = NULL;
  42 static xbt_swag_t cpu_im_modified_cpu = NULL;
  43 static xbt_heap_t cpu_im_action_heap = NULL;
  44 extern int sg_maxmin_selective_update;
  45
  46
  47 static xbt_swag_t
  48     cpu_im_running_action_set_that_does_not_need_being_checked = NULL;
  49
  50 static cpu_Cas01_im_t cpu_im_new(char *name, double power_peak,
  51                                  double power_scale,
  52                                  tmgr_trace_t power_trace,
  53                                  int core,
  54                                  e_surf_resource_state_t state_initial,
  55                                  tmgr_trace_t state_trace,
  56                                  xbt_dict_t cpu_properties)
  57 {
  58   cpu_Cas01_im_t cpu = NULL;
  59   s_surf_action_cpu_Cas01_im_t action;
  60   cpu = xbt_new0(s_cpu_Cas01_im_t, 1);
  61
  62   xbt_assert(!surf_cpu_resource_by_name(name),
  63               "Host '%s' declared several times in the platform file",
  64               name);
  65   cpu->generic_resource.model = surf_cpu_model;
  66   cpu->generic_resource.name = name;
  67   cpu->generic_resource.properties = cpu_properties;
  68   cpu->power_peak = power_peak;
  69   xbt_assert(cpu->power_peak > 0, "Power has to be >0");
  70   cpu->power_scale = power_scale;
  71   if (power_trace)
  72     cpu->power_event =
  73         tmgr_history_add_trace(history, power_trace, 0.0, 0, cpu);
  74   cpu->core = core;
  75   xbt_assert(core>0,"Invalid number of cores %d",core);
  76
  77   cpu->state_current = state_initial;
  78   if (state_trace)
  79     cpu->state_event =
  80         tmgr_history_add_trace(history, state_trace, 0.0, 0, cpu);
  81
  82   cpu->constraint =
  83       lmm_constraint_new(cpu_im_maxmin_system, cpu,
  84                          cpu->core * cpu->power_scale * cpu->power_peak);
  85
  86   xbt_lib_set(host_lib, name, SURF_CPU_LEVEL, cpu);
  87   cpu->action_set = xbt_swag_new(xbt_swag_offset(action, cpu_list_hookup));
  88
  89   return cpu;
  90 }
  91
  92
  93 static void parse_cpu_im_init(void)
  94 {
  95   double power_peak = 0.0;
  96   double power_scale = 0.0;
  97   int core = 0;
  98   tmgr_trace_t power_trace = NULL;
  99   e_surf_resource_state_t state_initial = SURF_RESOURCE_OFF;
 100   tmgr_trace_t state_trace = NULL;
 101
 102   power_peak = get_cpu_power(A_surfxml_host_power);
 103   surf_parse_get_double(&power_scale, A_surfxml_host_availability);
 104   power_trace = tmgr_trace_new(A_surfxml_host_availability_file);
 105   surf_parse_get_int(&core, A_surfxml_host_core);
 106
 107   xbt_assert((A_surfxml_host_state == A_surfxml_host_state_ON) ||
 108               (A_surfxml_host_state == A_surfxml_host_state_OFF),
 109               "Invalid state");
 110   if (A_surfxml_host_state == A_surfxml_host_state_ON)
 111     state_initial = SURF_RESOURCE_ON;
 112   if (A_surfxml_host_state == A_surfxml_host_state_OFF)
 113     state_initial = SURF_RESOURCE_OFF;
 114   state_trace = tmgr_trace_new(A_surfxml_host_state_file);
 115
 116   cpu_im_new(xbt_strdup(A_surfxml_host_id), power_peak, power_scale,
 117              power_trace, core, state_initial, state_trace,
 118              current_property_set);
 119   current_property_set = NULL;
 120
 121 }
 122
 123 static void cpu_im_add_traces_cpu(void)
 124 {
 125   xbt_dict_cursor_t cursor = NULL;
 126   char *trace_name, *elm;
 127   static int called = 0;
 128   if (called)
 129     return;
 130   called = 1;
 131
 132   /* connect all traces relative to hosts */
 133   xbt_dict_foreach(trace_connect_list_host_avail, cursor, trace_name, elm) {
 134     tmgr_trace_t trace = xbt_dict_get_or_null(traces_set_list, trace_name);
 135     cpu_Cas01_im_t host = surf_cpu_resource_by_name(elm);
 136
 137     xbt_assert(host, "Host %s undefined", elm);
 138     xbt_assert(trace, "Trace %s undefined", trace_name);
 139
 140     host->state_event =
 141         tmgr_history_add_trace(history, trace, 0.0, 0, host);
 142   }
 143
 144   xbt_dict_foreach(trace_connect_list_power, cursor, trace_name, elm) {
 145     tmgr_trace_t trace = xbt_dict_get_or_null(traces_set_list, trace_name);
 146     cpu_Cas01_im_t host = surf_cpu_resource_by_name(elm);
 147
 148     xbt_assert(host, "Host %s undefined", elm);
 149     xbt_assert(trace, "Trace %s undefined", trace_name);
 150
 151     host->power_event =
 152         tmgr_history_add_trace(history, trace, 0.0, 0, host);
 153   }
 154 }
 155
 156 static void cpu_im_define_callbacks(const char *file)
 157 {
 158   surfxml_add_callback(ETag_surfxml_host_cb_list, parse_cpu_im_init);
 159   surfxml_add_callback(ETag_surfxml_platform_cb_list,
 160                        &cpu_im_add_traces_cpu);
 161 }
 162
 163 static int cpu_im_resource_used(void *resource_id)
 164 {
 165   return lmm_constraint_used(cpu_im_maxmin_system,
 166                              ((cpu_Cas01_im_t) resource_id)->constraint);
 167 }
 168
 169 static int cpu_im_action_unref(surf_action_t action)
 170 {
 171   action->refcount--;
 172   if (!action->refcount) {
 173     xbt_swag_remove(action, action->state_set);
 174     if (((surf_action_lmm_t) action)->variable)
 175       lmm_variable_free(cpu_im_maxmin_system,
 176                         ((surf_action_lmm_t) action)->variable);
 177     /* remove from heap */
 178     xbt_heap_remove(cpu_im_action_heap,
 179                     ((surf_action_cpu_Cas01_im_t) action)->index_heap);
 180     xbt_swag_remove(action,
 181                     ((cpu_Cas01_im_t) ACTION_GET_CPU(action))->action_set);
 182     xbt_swag_insert(ACTION_GET_CPU(action), cpu_im_modified_cpu);
 183 #ifdef HAVE_TRACING
 184     if (action->category)
 185       xbt_free(action->category);
 186 #endif
 187     surf_action_free(&action);
 188     return 1;
 189   }
 190   return 0;
 191 }
 192
 193 static void cpu_im_action_cancel(surf_action_t action)
 194 {
 195   surf_action_state_set(action, SURF_ACTION_FAILED);
 196   xbt_heap_remove(cpu_im_action_heap,
 197                   ((surf_action_cpu_Cas01_im_t) action)->index_heap);
 198   xbt_swag_remove(action,
 199                   ((cpu_Cas01_im_t) ACTION_GET_CPU(action))->action_set);
 200   return;
 201 }
 202
 203 static void cpu_im_cpu_action_state_set(surf_action_t action,
 204                                         e_surf_action_state_t state)
 205 {
 206 /*   if((state==SURF_ACTION_DONE) || (state==SURF_ACTION_FAILED)) */
 207 /*     if(((surf_action_lmm_t)action)->variable) { */
 208 /*       lmm_variable_disable(cpu_im_maxmin_system, ((surf_action_lmm_t)action)->variable); */
 209 /*       ((surf_action_lmm_t)action)->variable = NULL; */
 210 /*     } */
 211
 212   surf_action_state_set(action, state);
 213   return;
 214 }
 215
 216 static void cpu_im_update_remains(cpu_Cas01_im_t cpu, double now)
 217 {
 218   surf_action_cpu_Cas01_im_t action;
 219
 220   if (cpu->last_update >= now)
 221     return;
 222   xbt_swag_foreach(action, cpu->action_set) {
 223     if (GENERIC_ACTION(action).state_set !=
 224         surf_cpu_model->states.running_action_set)
 225       continue;
 226
 227     /* bogus priority, skip it */
 228     if (GENERIC_ACTION(action).priority <= 0)
 229       continue;
 230
 231     if (GENERIC_ACTION(action).remains > 0) {
 232       double_update(&(GENERIC_ACTION(action).remains),
 233                     lmm_variable_getvalue(GENERIC_LMM_ACTION
 234                                           (action).variable) * (now -
 235                                                                 cpu->last_update));
 236 #ifdef HAVE_TRACING
 237       if (TRACE_is_active()) {
 238         TRACE_surf_host_set_utilization(cpu->generic_resource.name,
 239                                         action->
 240                                         generic_lmm_action.generic_action.
 241                                         data, (surf_action_t) action,
 242                                         lmm_variable_getvalue
 243                                         (GENERIC_LMM_ACTION
 244                                          (action).variable),
 245                                         cpu->last_update,
 246                                         now - cpu->last_update);
 247       }
 248 #endif
 249       XBT_DEBUG("Update action(%p) remains %lf", action,
 250              GENERIC_ACTION(action).remains);
 251     }
 252   }
 253   cpu->last_update = now;
 254 }
 255
 256 static double cpu_im_share_resources(double now)
 257 {
 258   surf_action_cpu_Cas01_im_t action;
 259   double min;
 260   double value;
 261   cpu_Cas01_im_t cpu, cpu_next;
 262
 263   xbt_swag_foreach(cpu, cpu_im_modified_cpu)
 264       cpu_im_update_remains(cpu, now);
 265
 266   lmm_solve(cpu_im_maxmin_system);
 267
 268   xbt_swag_foreach_safe(cpu, cpu_next, cpu_im_modified_cpu) {
 269     xbt_swag_foreach(action, cpu->action_set) {
 270       if (GENERIC_ACTION(action).state_set !=
 271           surf_cpu_model->states.running_action_set)
 272         continue;
 273
 274       /* bogus priority, skip it */
 275       if (GENERIC_ACTION(action).priority <= 0)
 276         continue;
 277
 278       min = -1;
 279       value = lmm_variable_getvalue(GENERIC_LMM_ACTION(action).variable);
 280       if (value > 0) {
 281         if (GENERIC_ACTION(action).remains > 0) {
 282           value = GENERIC_ACTION(action).remains / value;
 283           min = now + value;
 284         } else {
 285           value = 0.0;
 286           min = now;
 287         }
 288       }
 289
 290       if ((GENERIC_ACTION(action).max_duration != NO_MAX_DURATION)
 291           && (min == -1
 292               || GENERIC_ACTION(action).start +
 293               GENERIC_ACTION(action).max_duration < min))
 294         min =
 295             GENERIC_ACTION(action).start +
 296             GENERIC_ACTION(action).max_duration;
 297
 298       XBT_DEBUG("Action(%p) Start %lf Finish %lf Max_duration %lf", action,
 299              GENERIC_ACTION(action).start, now + value,
 300              GENERIC_ACTION(action).max_duration);
 301
 302       if (action->index_heap >= 0) {
 303         surf_action_cpu_Cas01_im_t heap_act =
 304             xbt_heap_remove(cpu_im_action_heap, action->index_heap);
 305         if (heap_act != action)
 306           DIE_IMPOSSIBLE;
 307       }
 308       if (min != -1) {
 309         xbt_heap_push(cpu_im_action_heap, action, min);
 310         XBT_DEBUG("Insert at heap action(%p) min %lf", action, min);
 311       }
 312     }
 313     xbt_swag_remove(cpu, cpu_im_modified_cpu);
 314   }
 315   return xbt_heap_size(cpu_im_action_heap) >
 316       0 ? xbt_heap_maxkey(cpu_im_action_heap) - now : -1;
 317 }
 318
 319 static void cpu_im_update_actions_state(double now, double delta)
 320 {
 321   surf_action_cpu_Cas01_im_t action;
 322
 323   while ((xbt_heap_size(cpu_im_action_heap) > 0)
 324          && (double_equals(xbt_heap_maxkey(cpu_im_action_heap), now))) {
 325     action = xbt_heap_pop(cpu_im_action_heap);
 326     XBT_DEBUG("Action %p: finish", action);
 327     GENERIC_ACTION(action).finish = surf_get_clock();
 328     /* set the remains to 0 due to precision problems when updating the remaining amount */
 329 #ifdef HAVE_TRACING
 330     if (TRACE_is_active()) {
 331       cpu_Cas01_im_t cpu = ((cpu_Cas01_im_t)(action->cpu));
 332       TRACE_surf_host_set_utilization(cpu->generic_resource.name,
 333           action->generic_lmm_action.generic_action.data,
 334           (surf_action_t) action,
 335           lmm_variable_getvalue (GENERIC_LMM_ACTION(action).variable),
 336           cpu->last_update,
 337           now - cpu->last_update);
 338     }
 339 #endif
 340     GENERIC_ACTION(action).remains = 0;
 341     cpu_im_cpu_action_state_set((surf_action_t) action, SURF_ACTION_DONE);
 342     cpu_im_update_remains(action->cpu, surf_get_clock());
 343   }
 344 #ifdef HAVE_TRACING
 345   if (TRACE_is_active()) {
 346     //defining the last timestamp that we can safely dump to trace file
 347     //without losing the event ascending order (considering all CPU's)
 348     void **data;
 349     cpu_Cas01_im_t cpu;
 350     xbt_lib_cursor_t cursor;
 351     char *key;
 352     double smaller = -1;
 353     xbt_lib_foreach(host_lib, cursor, key, data){
 354       if(data[SURF_CPU_LEVEL]){
 355         cpu = data[SURF_CPU_LEVEL];
 356         if (smaller < 0){
 357           smaller = cpu->last_update;
 358           continue;
 359         }
 360         if (cpu->last_update < smaller){
 361           smaller = cpu->last_update;
 362         }
 363       }
 364     }
 365     if (smaller > 0) {
 366       TRACE_last_timestamp_to_dump = smaller;
 367     }
 368   }
 369 #endif
 370   return;
 371 }
 372
 373 static void cpu_im_update_resource_state(void *id,
 374                                          tmgr_trace_event_t event_type,
 375                                          double value, double date)
 376 {
 377   cpu_Cas01_im_t cpu = id;
 378   lmm_variable_t var = NULL;
 379   lmm_element_t elem = NULL;
 380
 381   if (event_type == cpu->power_event) {
 382     cpu->power_scale = value;
 383     lmm_update_constraint_bound(cpu_im_maxmin_system, cpu->constraint,
 384                                 cpu->core * cpu->power_scale * cpu->power_peak);
 385 #ifdef HAVE_TRACING
 386     TRACE_surf_host_set_power(date, cpu->generic_resource.name,
 387                               cpu->core * cpu->power_scale * cpu->power_peak);
 388 #endif
 389     while ((var = lmm_get_var_from_cnst
 390             (cpu_im_maxmin_system, cpu->constraint, &elem))) {
 391         surf_action_cpu_Cas01_im_t action = lmm_variable_id(var);
 392         lmm_update_variable_bound(cpu_im_maxmin_system, action->generic_lmm_action.variable,
 393                                   cpu->power_scale * cpu->power_peak);
 394     }
 395     xbt_swag_insert(cpu, cpu_im_modified_cpu);
 396     if (tmgr_trace_event_free(event_type))
 397       cpu->power_event = NULL;
 398   } else if (event_type == cpu->state_event) {
 399     if (value > 0)
 400       cpu->state_current = SURF_RESOURCE_ON;
 401     else {
 402       lmm_constraint_t cnst = cpu->constraint;
 403       lmm_variable_t var = NULL;
 404       lmm_element_t elem = NULL;
 405
 406       cpu->state_current = SURF_RESOURCE_OFF;
 407
 408       while ((var =
 409               lmm_get_var_from_cnst(cpu_im_maxmin_system, cnst, &elem))) {
 410         surf_action_t action = lmm_variable_id(var);
 411
 412         if (surf_action_state_get(action) == SURF_ACTION_RUNNING ||
 413             surf_action_state_get(action) == SURF_ACTION_READY ||
 414             surf_action_state_get(action) ==
 415             SURF_ACTION_NOT_IN_THE_SYSTEM) {
 416           action->finish = date;
 417           cpu_im_cpu_action_state_set(action, SURF_ACTION_FAILED);
 418         }
 419       }
 420     }
 421     if (tmgr_trace_event_free(event_type))
 422       cpu->state_event = NULL;
 423   } else {
 424     XBT_CRITICAL("Unknown event ! \n");
 425     xbt_abort();
 426   }
 427
 428   return;
 429 }
 430
 431 static surf_action_t cpu_im_execute(void *cpu, double size)
 432 {
 433   surf_action_cpu_Cas01_im_t action = NULL;
 434   cpu_Cas01_im_t CPU = cpu;
 435
 436   XBT_IN("(%s,%g)", surf_resource_name(CPU), size);
 437   action =
 438       surf_action_new(sizeof(s_surf_action_cpu_Cas01_im_t), size,
 439                       surf_cpu_model,
 440                       CPU->state_current != SURF_RESOURCE_ON);
 441
 442   GENERIC_LMM_ACTION(action).suspended = 0;     /* Should be useless because of the
 443                                                    calloc but it seems to help valgrind... */
 444
 445   GENERIC_LMM_ACTION(action).variable =
 446       lmm_variable_new(cpu_im_maxmin_system, action,
 447                        GENERIC_ACTION(action).priority, CPU->power_scale * CPU->power_peak, 1);
 448   action->index_heap = -1;
 449   action->cpu = CPU;
 450   xbt_swag_insert(CPU, cpu_im_modified_cpu);
 451   xbt_swag_insert(action, CPU->action_set);
 452   lmm_expand(cpu_im_maxmin_system, CPU->constraint,
 453              GENERIC_LMM_ACTION(action).variable, 1.0);
 454   XBT_OUT();
 455   return (surf_action_t) action;
 456 }
 457
 458 static surf_action_t cpu_im_action_sleep(void *cpu, double duration)
 459 {
 460   surf_action_cpu_Cas01_im_t action = NULL;
 461
 462   if (duration > 0)
 463     duration = MAX(duration, MAXMIN_PRECISION);
 464
 465   XBT_IN("(%s,%g)", surf_resource_name(cpu), duration);
 466   action = (surf_action_cpu_Cas01_im_t) cpu_im_execute(cpu, 1.0);
 467   GENERIC_ACTION(action).max_duration = duration;
 468   GENERIC_LMM_ACTION(action).suspended = 2;
 469   if (duration == NO_MAX_DURATION) {
 470     /* Move to the *end* of the corresponding action set. This convention
 471        is used to speed up update_resource_state  */
 472     xbt_swag_remove(action, ((surf_action_t) action)->state_set);
 473     ((surf_action_t) action)->state_set =
 474         cpu_im_running_action_set_that_does_not_need_being_checked;
 475     xbt_swag_insert(action, ((surf_action_t) action)->state_set);
 476   }
 477
 478   lmm_update_variable_weight(cpu_im_maxmin_system,
 479                              GENERIC_LMM_ACTION(action).variable, 0.0);
 480   xbt_swag_insert(cpu, cpu_im_modified_cpu);
 481   XBT_OUT();
 482   return (surf_action_t) action;
 483 }
 484
 485 static void cpu_im_action_suspend(surf_action_t action)
 486 {
 487   XBT_IN("(%p)", action);
 488   if (((surf_action_lmm_t) action)->suspended != 2) {
 489     lmm_update_variable_weight(cpu_im_maxmin_system,
 490                                ((surf_action_lmm_t) action)->variable,
 491                                0.0);
 492     ((surf_action_lmm_t) action)->suspended = 1;
 493     xbt_heap_remove(cpu_im_action_heap,
 494                     ((surf_action_cpu_Cas01_im_t) action)->index_heap);
 495     xbt_swag_insert(ACTION_GET_CPU(action), cpu_im_modified_cpu);
 496   }
 497   XBT_OUT();
 498 }
 499
 500 static void cpu_im_action_resume(surf_action_t action)
 501 {
 502
 503   XBT_IN("(%p)", action);
 504   if (((surf_action_lmm_t) action)->suspended != 2) {
 505     lmm_update_variable_weight(cpu_im_maxmin_system,
 506                                ((surf_action_lmm_t) action)->variable,
 507                                action->priority);
 508     ((surf_action_lmm_t) action)->suspended = 0;
 509     xbt_swag_insert(ACTION_GET_CPU(action), cpu_im_modified_cpu);
 510   }
 511   XBT_OUT();
 512 }
 513
 514 static int cpu_im_action_is_suspended(surf_action_t action)
 515 {
 516   return (((surf_action_lmm_t) action)->suspended == 1);
 517 }
 518
 519 static void cpu_im_action_set_max_duration(surf_action_t action,
 520                                            double duration)
 521 {
 522   XBT_IN("(%p,%g)", action, duration);
 523
 524   action->max_duration = duration;
 525   /* insert cpu in modified_cpu set to notice the max duration change */
 526   xbt_swag_insert(ACTION_GET_CPU(action), cpu_im_modified_cpu);
 527   XBT_OUT();
 528 }
 529
 530 static void cpu_im_action_set_priority(surf_action_t action,
 531                                        double priority)
 532 {
 533   XBT_IN("(%p,%g)", action, priority);
 534   action->priority = priority;
 535   lmm_update_variable_weight(cpu_im_maxmin_system,
 536                              ((surf_action_lmm_t) action)->variable,
 537                              priority);
 538
 539   xbt_swag_insert(ACTION_GET_CPU(action), cpu_im_modified_cpu);
 540   XBT_OUT();
 541 }
 542
 543 #ifdef HAVE_TRACING
 544 static void cpu_im_action_set_category(surf_action_t action,
 545                                        const char *category)
 546 {
 547   XBT_IN("(%p,%s)", action, category);
 548   action->category = xbt_strdup (category);
 549   XBT_OUT();
 550 }
 551 #endif
 552
 553 static double cpu_im_action_get_remains(surf_action_t action)
 554 {
 555   XBT_IN("(%p)", action);
 556   /* update remains before return it */
 557   cpu_im_update_remains(ACTION_GET_CPU(action), surf_get_clock());
 558   return action->remains;
 559   XBT_OUT();
 560 }
 561
 562 static e_surf_resource_state_t cpu_im_get_state(void *cpu)
 563 {
 564   return ((cpu_Cas01_im_t) cpu)->state_current;
 565 }
 566
 567 static double cpu_im_get_speed(void *cpu, double load)
 568 {
 569   return load * (((cpu_Cas01_im_t) cpu)->power_peak);
 570 }
 571
 572 static double cpu_im_get_available_speed(void *cpu)
 573 {
 574   /* number between 0 and 1 */
 575   return ((cpu_Cas01_im_t) cpu)->power_scale;
 576 }
 577
 578 static void cpu_im_action_update_index_heap(void *action, int i)
 579 {
 580   ((surf_action_cpu_Cas01_im_t) action)->index_heap = i;
 581 }
 582
 583 static void cpu_im_create_resource(char *name, double power_peak,
 584                                    double power_scale,
 585                                    tmgr_trace_t power_trace,
 586                                    int core,
 587                                    e_surf_resource_state_t state_initial,
 588                                    tmgr_trace_t state_trace,
 589                                    xbt_dict_t cpu_properties)
 590 {
 591   cpu_im_new(name, power_peak, power_scale, power_trace, core,
 592              state_initial, state_trace, cpu_properties);
 593 }
 594
 595 static void cpu_im_finalize(void)
 596 {
 597   void **cpu;
 598   xbt_lib_cursor_t cursor;
 599   char *key;
 600
 601   xbt_lib_foreach(host_lib, cursor, key, cpu){
 602           if(cpu[SURF_CPU_LEVEL])
 603           {
 604                     cpu_Cas01_im_t CPU = cpu[SURF_CPU_LEVEL];
 605                     xbt_swag_free(CPU->action_set);
 606           }
 607   }
 608
 609   lmm_system_free(cpu_im_maxmin_system);
 610   cpu_im_maxmin_system = NULL;
 611
 612   surf_model_exit(surf_cpu_model);
 613   surf_cpu_model = NULL;
 614
 615   xbt_swag_free
 616       (cpu_im_running_action_set_that_does_not_need_being_checked);
 617   cpu_im_running_action_set_that_does_not_need_being_checked = NULL;
 618   xbt_heap_free(cpu_im_action_heap);
 619   xbt_swag_free(cpu_im_modified_cpu);
 620 }
 621
 622 static void surf_cpu_im_model_init_internal(void)
 623 {
 624   s_surf_action_t action;
 625   s_cpu_Cas01_im_t cpu;
 626
 627   surf_cpu_model = surf_model_init();
 628
 629   cpu_im_running_action_set_that_does_not_need_being_checked =
 630       xbt_swag_new(xbt_swag_offset(action, state_hookup));
 631
 632   surf_cpu_model->name = "CPU_IM";
 633
 634   surf_cpu_model->action_unref = cpu_im_action_unref;
 635   surf_cpu_model->action_cancel = cpu_im_action_cancel;
 636   surf_cpu_model->action_state_set = cpu_im_cpu_action_state_set;
 637
 638   surf_cpu_model->model_private->resource_used = cpu_im_resource_used;
 639   surf_cpu_model->model_private->share_resources = cpu_im_share_resources;
 640   surf_cpu_model->model_private->update_actions_state =
 641       cpu_im_update_actions_state;
 642   surf_cpu_model->model_private->update_resource_state =
 643       cpu_im_update_resource_state;
 644   surf_cpu_model->model_private->finalize = cpu_im_finalize;
 645
 646   surf_cpu_model->suspend = cpu_im_action_suspend;
 647   surf_cpu_model->resume = cpu_im_action_resume;
 648   surf_cpu_model->is_suspended = cpu_im_action_is_suspended;
 649   surf_cpu_model->set_max_duration = cpu_im_action_set_max_duration;
 650   surf_cpu_model->set_priority = cpu_im_action_set_priority;
 651 #ifdef HAVE_TRACING
 652   surf_cpu_model->set_category = cpu_im_action_set_category;
 653 #endif
 654   surf_cpu_model->get_remains = cpu_im_action_get_remains;
 655
 656   surf_cpu_model->extension.cpu.execute = cpu_im_execute;
 657   surf_cpu_model->extension.cpu.sleep = cpu_im_action_sleep;
 658
 659   surf_cpu_model->extension.cpu.get_state = cpu_im_get_state;
 660   surf_cpu_model->extension.cpu.get_speed = cpu_im_get_speed;
 661   surf_cpu_model->extension.cpu.get_available_speed =
 662       cpu_im_get_available_speed;
 663   surf_cpu_model->extension.cpu.create_resource = cpu_im_create_resource;
 664   surf_cpu_model->extension.cpu.add_traces = cpu_im_add_traces_cpu;
 665
 666   if (!cpu_im_maxmin_system) {
 667     sg_maxmin_selective_update = 1;
 668     cpu_im_maxmin_system = lmm_system_new();
 669   }
 670   cpu_im_action_heap = xbt_heap_new(8, NULL);
 671   xbt_heap_set_update_callback(cpu_im_action_heap,
 672                                cpu_im_action_update_index_heap);
 673   cpu_im_modified_cpu =
 674       xbt_swag_new(xbt_swag_offset(cpu, modified_cpu_hookup));
 675 }
 676
 677 /*********************************************************************/
 678 /* Basic sharing model for CPU: that is where all this started... ;) */
 679 /*********************************************************************/
 680 /* @InProceedings{casanova01simgrid, */
 681 /*   author =       "H. Casanova", */
 682 /*   booktitle =    "Proceedings of the IEEE Symposium on Cluster Computing */
 683 /*                  and the Grid (CCGrid'01)", */
 684 /*   publisher =    "IEEE Computer Society", */
 685 /*   title =        "Simgrid: {A} Toolkit for the Simulation of Application */
 686 /*                  Scheduling", */
 687 /*   year =         "2001", */
 688 /*   month =        may, */
 689 /*   note =         "Available at */
 690 /*                  \url{http://grail.sdsc.edu/papers/simgrid_ccgrid01.ps.gz}." */
 691 /* } */
 692 void surf_cpu_model_init_Cas01_im(const char *filename)
 693 {
 694   if (surf_cpu_model)
 695     return;
 696   surf_cpu_im_model_init_internal();
 697   cpu_im_define_callbacks(filename);
 698   xbt_dynar_push(model_list, &surf_cpu_model);
 699 }