src/mc/mc_state.c

   1 /* Copyright (c) 2008-2014. The SimGrid Team.
   2  * All rights reserved.                                                     */
   3
   4 /* This program is free software; you can redistribute it and/or modify it
   5  * under the terms of the license (GNU LGPL) which comes with this package. */
   6
   7 #include <assert.h>
   8
   9 #include "../simix/smx_private.h"
  10 #include "xbt/fifo.h"
  11 #include "mc_state.h"
  12 #include "mc_request.h"
  13 #include "mc_private.h"
  14 #include "mc_comm_pattern.h"
  15 #include "mc_smx.h"
  16
  17 /**
  18  * \brief Creates a state data structure used by the exploration algorithm
  19  */
  20 mc_state_t MC_state_new()
  21 {
  22   mc_state_t state = xbt_new0(s_mc_state_t, 1);
  23   state->max_pid = MC_smx_get_maxpid();
  24   state->proc_status = xbt_new0(s_mc_procstate_t, state->max_pid);
  25   state->system_state = NULL;
  26   state->num = ++mc_stats->expanded_states;
  27   state->in_visited_states = 0;
  28   state->incomplete_comm_pattern = NULL;
  29   /* Stateful model checking */
  30   if((_sg_mc_checkpoint > 0 && (mc_stats->expanded_states % _sg_mc_checkpoint == 0)) ||  _sg_mc_termination){
  31     state->system_state = MC_take_snapshot(state->num);
  32     if(_sg_mc_comms_determinism || _sg_mc_send_determinism){
  33       MC_state_copy_incomplete_communications_pattern(state);
  34       MC_state_copy_index_communications_pattern(state);
  35     }
  36   }
  37   return state;
  38 }
  39
  40 /**
  41  * \brief Deletes a state data structure
  42  * \param trans The state to be deleted
  43  */
  44 void MC_state_delete(mc_state_t state, int free_snapshot){
  45   if (state->system_state && free_snapshot){
  46     MC_free_snapshot(state->system_state);
  47   }
  48   if(_sg_mc_comms_determinism || _sg_mc_send_determinism){
  49     xbt_free(state->index_comm);
  50     xbt_free(state->incomplete_comm_pattern);
  51   }
  52   xbt_free(state->proc_status);
  53   xbt_free(state);
  54 }
  55
  56 void MC_state_interleave_process(mc_state_t state, smx_process_t process)
  57 {
  58   assert(state);
  59   state->proc_status[process->pid].state = MC_INTERLEAVE;
  60   state->proc_status[process->pid].interleave_count = 0;
  61 }
  62
  63 void MC_state_remove_interleave_process(mc_state_t state, smx_process_t process)
  64 {
  65   if (state->proc_status[process->pid].state == MC_INTERLEAVE)
  66     state->proc_status[process->pid].state = MC_DONE;
  67 }
  68
  69 unsigned int MC_state_interleave_size(mc_state_t state)
  70 {
  71   unsigned int i, size = 0;
  72
  73   for (i = 0; i < state->max_pid; i++) {
  74     if ((state->proc_status[i].state == MC_INTERLEAVE)
  75         || (state->proc_status[i].state == MC_MORE_INTERLEAVE))
  76       size++;
  77   }
  78
  79   return size;
  80 }
  81
  82 int MC_state_process_is_done(mc_state_t state, smx_process_t process)
  83 {
  84   return state->proc_status[process->pid].state == MC_DONE ? TRUE : FALSE;
  85 }
  86
  87 void MC_state_set_executed_request(mc_state_t state, smx_simcall_t req,
  88                                    int value)
  89 {
  90   state->executed_req = *req;
  91   state->req_num = value;
  92   smx_process_t process = NULL;
  93   mc_procstate_t procstate = NULL;
  94
  95   /* The waitany and testany request are transformed into a wait or test request over the
  96    * corresponding communication action so it can be treated later by the dependence
  97    * function. */
  98   switch (req->call) {
  99   case SIMCALL_COMM_WAITANY:
 100     state->internal_req.call = SIMCALL_COMM_WAIT;
 101     state->internal_req.issuer = req->issuer;
 102     MC_process_read_dynar_element(&mc_model_checker->process,
 103       &state->internal_comm, simcall_comm_waitany__get__comms(req),
 104       sizeof(state->internal_comm));
 105     simcall_comm_wait__set__comm(&state->internal_req, &state->internal_comm);
 106     simcall_comm_wait__set__timeout(&state->internal_req, 0);
 107     break;
 108
 109   case SIMCALL_COMM_TESTANY:
 110     state->internal_req.call = SIMCALL_COMM_TEST;
 111     state->internal_req.issuer = req->issuer;
 112
 113     if (value > 0)
 114         MC_process_read_dynar_element(&mc_model_checker->process,
 115           &state->internal_comm, simcall_comm_testany__get__comms(req),
 116           sizeof(state->internal_comm));
 117
 118     simcall_comm_test__set__comm(&state->internal_req, &state->internal_comm);
 119     simcall_comm_test__set__result(&state->internal_req, value);
 120     break;
 121
 122   case SIMCALL_COMM_WAIT:
 123     state->internal_req = *req;
 124     MC_process_read_simple(&mc_model_checker->process, &state->internal_comm ,
 125       simcall_comm_wait__get__comm(req), sizeof(state->internal_comm));
 126     simcall_comm_wait__set__comm(&state->executed_req, &state->internal_comm);
 127     simcall_comm_wait__set__comm(&state->internal_req, &state->internal_comm);
 128     break;
 129
 130   case SIMCALL_COMM_TEST:
 131     state->internal_req = *req;
 132     MC_process_read_simple(&mc_model_checker->process, &state->internal_comm,
 133       simcall_comm_test__get__comm(req), sizeof(state->internal_comm));
 134     simcall_comm_test__set__comm(&state->executed_req, &state->internal_comm);
 135     simcall_comm_test__set__comm(&state->internal_req, &state->internal_comm);
 136     break;
 137
 138   case SIMCALL_MC_RANDOM:
 139     state->internal_req = *req;
 140     int random_max = simcall_mc_random__get__max(req);
 141     if (value != random_max) {
 142       MC_EACH_SIMIX_PROCESS(process,
 143         procstate = &state->proc_status[process->pid];
 144         const smx_process_t issuer = MC_smx_simcall_get_issuer(req);
 145         if (process->pid == issuer->pid) {
 146           procstate->state = MC_MORE_INTERLEAVE;
 147           break;
 148         }
 149       );
 150     }
 151     break;
 152
 153   default:
 154     state->internal_req = *req;
 155     break;
 156   }
 157 }
 158
 159 smx_simcall_t MC_state_get_executed_request(mc_state_t state, int *value)
 160 {
 161   *value = state->req_num;
 162   return &state->executed_req;
 163 }
 164
 165 smx_simcall_t MC_state_get_internal_request(mc_state_t state)
 166 {
 167   return &state->internal_req;
 168 }
 169
 170 smx_simcall_t MC_state_get_request(mc_state_t state, int *value)
 171 {
 172   smx_process_t process = NULL;
 173   mc_procstate_t procstate = NULL;
 174   unsigned int start_count;
 175   smx_synchro_t act = NULL;
 176
 177   MC_EACH_SIMIX_PROCESS(process,
 178     procstate = &state->proc_status[process->pid];
 179
 180     if (procstate->state != MC_INTERLEAVE
 181         && procstate->state != MC_MORE_INTERLEAVE)
 182         continue;
 183     if (!MC_process_is_enabled(process))
 184       continue;
 185
 186     switch (process->simcall.call) {
 187         case SIMCALL_COMM_WAITANY:
 188           *value = -1;
 189           while (procstate->interleave_count <
 190                 MC_process_read_dynar_length(&mc_model_checker->process,
 191                   simcall_comm_waitany__get__comms(&process->simcall))) {
 192             if (MC_request_is_enabled_by_idx
 193                 (&process->simcall, procstate->interleave_count++)) {
 194               *value = procstate->interleave_count - 1;
 195               break;
 196             }
 197           }
 198
 199           if (procstate->interleave_count >=
 200               MC_process_read_dynar_length(&mc_model_checker->process,
 201                 simcall_comm_waitany__get__comms(&process->simcall)))
 202             procstate->state = MC_DONE;
 203
 204           if (*value != -1)
 205             return &process->simcall;
 206
 207           break;
 208
 209         case SIMCALL_COMM_TESTANY:
 210           start_count = procstate->interleave_count;
 211           *value = -1;
 212           while (procstate->interleave_count <
 213                   MC_process_read_dynar_length(&mc_model_checker->process,
 214                     simcall_comm_testany__get__comms(&process->simcall))) {
 215             if (MC_request_is_enabled_by_idx
 216                 (&process->simcall, procstate->interleave_count++)) {
 217               *value = procstate->interleave_count - 1;
 218               break;
 219             }
 220           }
 221
 222           if (procstate->interleave_count >=
 223               MC_process_read_dynar_length(&mc_model_checker->process,
 224                 simcall_comm_testany__get__comms(&process->simcall)))
 225             procstate->state = MC_DONE;
 226
 227           if (*value != -1 || start_count == 0)
 228             return &process->simcall;
 229
 230           break;
 231
 232         case SIMCALL_COMM_WAIT:
 233           act = simcall_comm_wait__get__comm(&process->simcall);
 234
 235           if (act->comm.src_proc && act->comm.dst_proc) {
 236             *value = 0;
 237           } else {
 238             if (act->comm.src_proc == NULL && act->comm.type == SIMIX_COMM_READY
 239                 && act->comm.detached == 1)
 240               *value = 0;
 241             else
 242               *value = -1;
 243           }
 244           procstate->state = MC_DONE;
 245           return &process->simcall;
 246
 247           break;
 248
 249         case SIMCALL_MC_RANDOM:
 250           if (procstate->state == MC_INTERLEAVE)
 251             *value = 0;
 252           else {
 253             if (state->req_num < simcall_mc_random__get__max(&process->simcall))
 254               *value = state->req_num + 1;
 255           }
 256           procstate->state = MC_DONE;
 257           return &process->simcall;
 258           break;
 259
 260         default:
 261           procstate->state = MC_DONE;
 262           *value = 0;
 263           return &process->simcall;
 264           break;
 265
 266     }
 267   );
 268
 269   return NULL;
 270 }