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[mc] Access memory from another process
[simgrid.git] / src / mc / mc_state.c
1 /* Copyright (c) 2008-2014. The SimGrid Team.
2  * All rights reserved.                                                     */
3
4 /* This program is free software; you can redistribute it and/or modify it
5  * under the terms of the license (GNU LGPL) which comes with this package. */
6
7 #include "../simix/smx_private.h"
8 #include "xbt/fifo.h"
9 #include "mc_state.h"
10 #include "mc_request.h"
11 #include "mc_private.h"
12
13 /**
14  * \brief Creates a state data structure used by the exploration algorithm
15  */
16 mc_state_t MC_state_new()
17 {
18   mc_state_t state = NULL;
19
20   state = xbt_new0(s_mc_state_t, 1);
21   state->max_pid = simix_process_maxpid;
22   state->proc_status = xbt_new0(s_mc_procstate_t, state->max_pid);
23   state->system_state = NULL;
24   state->num = ++mc_stats->expanded_states;
25
26   return state;
27 }
28
29 /**
30  * \brief Deletes a state data structure
31  * \param trans The state to be deleted
32  */
33 void MC_state_delete(mc_state_t state)
34 {
35   if (state->system_state)
36     MC_free_snapshot(state->system_state);
37   xbt_free(state->proc_status);
38   xbt_free(state);
39 }
40
41 void MC_state_interleave_process(mc_state_t state, smx_process_t process)
42 {
43   state->proc_status[process->pid].state = MC_INTERLEAVE;
44   state->proc_status[process->pid].interleave_count = 0;
45 }
46
47 void MC_state_remove_interleave_process(mc_state_t state, smx_process_t process)
48 {
49   if (state->proc_status[process->pid].state == MC_INTERLEAVE)
50     state->proc_status[process->pid].state = MC_DONE;
51 }
52
53 unsigned int MC_state_interleave_size(mc_state_t state)
54 {
55   unsigned int i, size = 0;
56
57   for (i = 0; i < state->max_pid; i++) {
58     if ((state->proc_status[i].state == MC_INTERLEAVE)
59         || (state->proc_status[i].state == MC_MORE_INTERLEAVE))
60       size++;
61   }
62
63   return size;
64 }
65
66 int MC_state_process_is_done(mc_state_t state, smx_process_t process)
67 {
68   return state->proc_status[process->pid].state == MC_DONE ? TRUE : FALSE;
69 }
70
71 void MC_state_set_executed_request(mc_state_t state, smx_simcall_t req,
72                                    int value)
73 {
74   state->executed_req = *req;
75   state->req_num = value;
76   smx_process_t process = NULL;
77   mc_procstate_t procstate = NULL;
78
79   /* The waitany and testany request are transformed into a wait or test request over the
80    * corresponding communication action so it can be treated later by the dependence
81    * function. */
82   switch (req->call) {
83   case SIMCALL_COMM_WAITANY:
84     state->internal_req.call = SIMCALL_COMM_WAIT;
85     state->internal_req.issuer = req->issuer;
86     state->internal_comm =
87         *xbt_dynar_get_as(simcall_comm_waitany__get__comms(req), value,
88                           smx_synchro_t);
89     simcall_comm_wait__set__comm(&state->internal_req, &state->internal_comm);
90     simcall_comm_wait__set__timeout(&state->internal_req, 0);
91     break;
92
93   case SIMCALL_COMM_TESTANY:
94     state->internal_req.call = SIMCALL_COMM_TEST;
95     state->internal_req.issuer = req->issuer;
96
97     if (value > 0)
98       state->internal_comm =
99           *xbt_dynar_get_as(simcall_comm_testany__get__comms(req), value,
100                             smx_synchro_t);
101
102     simcall_comm_test__set__comm(&state->internal_req, &state->internal_comm);
103     simcall_comm_test__set__result(&state->internal_req, value);
104     break;
105
106   case SIMCALL_COMM_WAIT:
107     state->internal_req = *req;
108     state->internal_comm = *(simcall_comm_wait__get__comm(req));
109     simcall_comm_wait__set__comm(&state->executed_req, &state->internal_comm);
110     simcall_comm_wait__set__comm(&state->internal_req, &state->internal_comm);
111     break;
112
113   case SIMCALL_COMM_TEST:
114     state->internal_req = *req;
115     state->internal_comm = *simcall_comm_test__get__comm(req);
116     simcall_comm_test__set__comm(&state->executed_req, &state->internal_comm);
117     simcall_comm_test__set__comm(&state->internal_req, &state->internal_comm);
118     break;
119
120   case SIMCALL_MC_RANDOM:
121     state->internal_req = *req;
122     if (value != simcall_mc_random__get__max(req)) {
123       xbt_swag_foreach(process, simix_global->process_list) {
124         procstate = &state->proc_status[process->pid];
125         if (process->pid == req->issuer->pid) {
126           procstate->state = MC_MORE_INTERLEAVE;
127           break;
128         }
129       }
130     }
131     break;
132
133   default:
134     state->internal_req = *req;
135     break;
136   }
137 }
138
139 smx_simcall_t MC_state_get_executed_request(mc_state_t state, int *value)
140 {
141   *value = state->req_num;
142   return &state->executed_req;
143 }
144
145 smx_simcall_t MC_state_get_internal_request(mc_state_t state)
146 {
147   return &state->internal_req;
148 }
149
150 smx_simcall_t MC_state_get_request(mc_state_t state, int *value)
151 {
152   smx_process_t process = NULL;
153   mc_procstate_t procstate = NULL;
154   unsigned int start_count;
155   smx_synchro_t act = NULL;
156
157   xbt_swag_foreach(process, simix_global->process_list) {
158     procstate = &state->proc_status[process->pid];
159
160     if (procstate->state == MC_INTERLEAVE
161         || procstate->state == MC_MORE_INTERLEAVE) {
162       if (MC_process_is_enabled(process)) {
163         switch (process->simcall.call) {
164         case SIMCALL_COMM_WAITANY:
165           *value = -1;
166           while (procstate->interleave_count <
167                  xbt_dynar_length(simcall_comm_waitany__get__comms
168                                   (&process->simcall))) {
169             if (MC_request_is_enabled_by_idx
170                 (&process->simcall, procstate->interleave_count++)) {
171               *value = procstate->interleave_count - 1;
172               break;
173             }
174           }
175
176           if (procstate->interleave_count >=
177               xbt_dynar_length(simcall_comm_waitany__get__comms
178                                (&process->simcall)))
179             procstate->state = MC_DONE;
180
181           if (*value != -1)
182             return &process->simcall;
183
184           break;
185
186         case SIMCALL_COMM_TESTANY:
187           start_count = procstate->interleave_count;
188           *value = -1;
189           while (procstate->interleave_count <
190                  xbt_dynar_length(simcall_comm_testany__get__comms
191                                   (&process->simcall))) {
192             if (MC_request_is_enabled_by_idx
193                 (&process->simcall, procstate->interleave_count++)) {
194               *value = procstate->interleave_count - 1;
195               break;
196             }
197           }
198
199           if (procstate->interleave_count >=
200               xbt_dynar_length(simcall_comm_testany__get__comms
201                                (&process->simcall)))
202             procstate->state = MC_DONE;
203
204           if (*value != -1 || start_count == 0)
205             return &process->simcall;
206
207           break;
208
209         case SIMCALL_COMM_WAIT:
210           act = simcall_comm_wait__get__comm(&process->simcall);
211           if (act->comm.src_proc && act->comm.dst_proc) {
212             *value = 0;
213           } else {
214             if (act->comm.src_proc == NULL && act->comm.type == SIMIX_COMM_READY
215                 && act->comm.detached == 1)
216               *value = 0;
217             else
218               *value = -1;
219           }
220           procstate->state = MC_DONE;
221           return &process->simcall;
222
223           break;
224
225         case SIMCALL_MC_RANDOM:
226           if (procstate->state == MC_INTERLEAVE)
227             *value = 0;
228           else {
229             if (state->req_num < simcall_mc_random__get__max(&process->simcall))
230               *value = state->req_num + 1;
231           }
232           procstate->state = MC_DONE;
233           return &process->simcall;
234           break;
235
236         default:
237           procstate->state = MC_DONE;
238           *value = 0;
239           return &process->simcall;
240           break;
241         }
242       }
243     }
244   }
245
246   return NULL;
247 }